| /drivers/gpu/drm/i915/display/ |
| A D | intel_bw.c | 852 unsigned int data_rate = 0; in intel_bw_crtc_data_rate() local 863 data_rate += crtc_state->data_rate[plane_id]; in intel_bw_crtc_data_rate() 869 return data_rate; in intel_bw_crtc_data_rate() 874 unsigned int data_rate) in intel_bw_crtc_min_cdclk() argument 898 unsigned int data_rate = 0; in intel_bw_data_rate() local 902 data_rate += bw_state->data_rate[pipe]; in intel_bw_data_rate() 905 data_rate = DIV_ROUND_UP(data_rate * 105, 100); in intel_bw_data_rate() 907 return data_rate; in intel_bw_data_rate() 1141 qgv_peak_bw, data_rate); in mtl_find_qgv_points() 1255 data_rate = DIV_ROUND_UP(data_rate, 1000); in intel_bw_check_qgv_points() [all …]
|
| A D | skl_watermark.c | 1291 u64 data_rate = 0; in skl_total_relative_data_rate() local 1297 data_rate += crtc_state->rel_data_rate[plane_id]; in skl_total_relative_data_rate() 1300 data_rate += crtc_state->rel_data_rate_y[plane_id]; in skl_total_relative_data_rate() 1303 return data_rate; in skl_total_relative_data_rate() 1380 u64 data_rate; member 1388 u64 data_rate) in skl_allocate_plane_ddb() argument 1392 if (data_rate) { in skl_allocate_plane_ddb() 1394 DIV64_U64_ROUND_UP(iter->size * data_rate, in skl_allocate_plane_ddb() 1395 iter->data_rate)); in skl_allocate_plane_ddb() 1397 iter->data_rate -= data_rate; in skl_allocate_plane_ddb() [all …]
|
| A D | intel_plane.c | 435 crtc_state->data_rate[plane->id] = 0; in intel_plane_set_invisible() 707 new_crtc_state->data_rate[plane->id] = in intel_plane_atomic_check_with_state() 717 new_crtc_state->data_rate[plane->id] = in intel_plane_atomic_check_with_state() 1480 crtc_state->data_rate[y_plane->id] = crtc_state->data_rate_y[uv_plane->id]; in link_nv12_planes() 1514 crtc_state->data_rate[plane->id] = 0; in unlink_nv12_plane()
|
| /drivers/iio/adc/ |
| A D | ti-ads1015.c | 84 const int *data_rate; member 236 unsigned int data_rate; member 399 const int *data_rate = data->chip->data_rate; in ads1015_get_adc_result() local 527 *vals = data->chip->data_rate; in ads1015_read_avail() 647 const int *data_rate = data->chip->data_rate; in ads1015_write_event() local 896 data_rate = pval; in ads1015_client_get_channels_config() 897 if (data_rate > 7) { in ads1015_client_get_channels_config() 904 data->channel_data[channel].data_rate = data_rate; in ads1015_client_get_channels_config() 1104 .data_rate = ads1015_data_rate, 1115 .data_rate = ads1115_data_rate, [all …]
|
| A D | ti-ads131e08.c | 97 unsigned int data_rate; member 249 static int ads131e08_set_data_rate(struct ads131e08_state *st, int data_rate) in ads131e08_set_data_rate() argument 254 if (ads131e08_data_rate_tbl[i].rate == data_rate) in ads131e08_set_data_rate() 275 st->data_rate = data_rate; in ads131e08_set_data_rate() 277 ADS131E08_NUM_DATA_BYTES(st->data_rate) * in ads131e08_set_data_rate() 491 channel->channel * ADS131E08_NUM_DATA_BYTES(st->data_rate); in ads131e08_read_direct() 493 num_bits = ADS131E08_NUM_DATA_BITS(st->data_rate); in ads131e08_read_direct() 530 *value2 = ADS131E08_NUM_DATA_BITS(st->data_rate) - 1; in ads131e08_read_raw() 535 *value = st->data_rate; in ads131e08_read_raw() 627 unsigned int num_bytes = ADS131E08_NUM_DATA_BYTES(st->data_rate); in ads131e08_trigger_handler()
|
| /drivers/phy/mediatek/ |
| A D | phy-mtk-mipi-dsi-mt8183.c | 54 dev_dbg(mipi_tx->dev, "enable: %u bps\n", mipi_tx->data_rate); in mtk_mipi_tx_pll_enable() 56 if (mipi_tx->data_rate >= 2000000000) { in mtk_mipi_tx_pll_enable() 59 } else if (mipi_tx->data_rate >= 1000000000) { in mtk_mipi_tx_pll_enable() 62 } else if (mipi_tx->data_rate >= 500000000) { in mtk_mipi_tx_pll_enable() 65 } else if (mipi_tx->data_rate > 250000000) { in mtk_mipi_tx_pll_enable() 68 } else if (mipi_tx->data_rate >= 125000000) { in mtk_mipi_tx_pll_enable() 81 pcw = div_u64(((u64)mipi_tx->data_rate * txdiv) << 24, 26000000); in mtk_mipi_tx_pll_enable()
|
| A D | phy-mtk-mipi-dsi-mt8173.c | 129 dev_dbg(mipi_tx->dev, "prepare: %u Hz\n", mipi_tx->data_rate); in mtk_mipi_tx_pll_prepare() 131 if (mipi_tx->data_rate >= 500000000) { in mtk_mipi_tx_pll_prepare() 135 } else if (mipi_tx->data_rate >= 250000000) { in mtk_mipi_tx_pll_prepare() 139 } else if (mipi_tx->data_rate >= 125000000) { in mtk_mipi_tx_pll_prepare() 143 } else if (mipi_tx->data_rate > 62000000) { in mtk_mipi_tx_pll_prepare() 147 } else if (mipi_tx->data_rate >= 50000000) { in mtk_mipi_tx_pll_prepare() 196 pcw = div_u64(((u64)mipi_tx->data_rate * 2 * txdiv) << 24, 26000000); in mtk_mipi_tx_pll_prepare()
|
| A D | phy-mtk-mipi-dsi.c | 20 mipi_tx->data_rate = rate; in mtk_mipi_tx_pll_set_rate() 30 return mipi_tx->data_rate; in mtk_mipi_tx_pll_recalc_rate()
|
| A D | phy-mtk-mipi-dsi.h | 29 u32 data_rate; member
|
| /drivers/net/wan/framer/pef2256/ |
| A D | pef2256.c | 45 u32 data_rate; member 381 switch (pef2256->data_rate) { in pef2256_setup_e1_system() 399 dev_err(pef2256->dev, "Unsupported data rate %u\n", pef2256->data_rate); in pef2256_setup_e1_system() 546 unsigned long data_rate) in pef2256_check_rates() argument 561 for (rate = data_rate; rate <= data_rate * 4; rate *= 2) { in pef2256_check_rates() 566 data_rate, sysclk_rate); in pef2256_check_rates() 574 pef2256->data_rate = 2048000; in pef2556_of_parse() 575 ret = of_property_read_u32(np, "lantiq,data-rate-bps", &pef2256->data_rate); in pef2556_of_parse() 581 ret = pef2256_check_rates(pef2256, pef2256->sysclk_rate, pef2256->data_rate); in pef2556_of_parse() 594 if (pef2256->channel_phase >= pef2256->sysclk_rate / pef2256->data_rate) { in pef2556_of_parse()
|
| /drivers/media/dvb-frontends/ |
| A D | si21xx.c | 352 u32 sym_rate, data_rate; in si21xx_set_symbolrate() local 361 data_rate = srate; in si21xx_set_symbolrate() 366 sym_rate = sym_rate + ((data_rate % 100) * 0x800000) / in si21xx_set_symbolrate() 368 data_rate /= 100; in si21xx_set_symbolrate() 727 int data_rate; in si21xx_set_frontend() local 748 data_rate = c->symbol_rate / 100; in si21xx_set_frontend() 751 + (data_rate * 135)) / 200; in si21xx_set_frontend() 754 + (data_rate * 135)) / 200; in si21xx_set_frontend()
|
| /drivers/char/hw_random/ |
| A D | optee-rng.c | 65 u32 data_rate; member 131 if (wait && pvt_data->data_rate) { in optee_rng_read() 134 msleep((1000 * (max - read)) / pvt_data->data_rate); in optee_rng_read() 200 pvt_data.data_rate = param[0].u.value.a; in get_optee_rng_info()
|
| /drivers/gpu/drm/radeon/ |
| A D | rv740_dpm.c | 97 u16 data_rate; in rv740_get_dll_speed() local 104 data_rate = (u16)(memory_clock * factor / 1000); in rv740_get_dll_speed() 106 if (data_rate < dll_speed_table[0].max) { in rv740_get_dll_speed() 108 if (data_rate > dll_speed_table[i].min && in rv740_get_dll_speed() 109 data_rate <= dll_speed_table[i].max) in rv740_get_dll_speed()
|
| /drivers/net/wireless/marvell/mwifiex/ |
| A D | join.c | 161 priv->data_rate); in mwifiex_get_common_rates() 165 if ((*ptr & 0x7f) == priv->data_rate) { in mwifiex_get_common_rates() 174 priv->data_rate); in mwifiex_get_common_rates() 996 memset(adhoc_start->data_rate, 0, sizeof(adhoc_start->data_rate)); in mwifiex_cmd_802_11_ad_hoc_start() 997 mwifiex_get_active_data_rates(priv, adhoc_start->data_rate); in mwifiex_cmd_802_11_ad_hoc_start() 1009 for (i = 0; i < sizeof(adhoc_start->data_rate); i++) in mwifiex_cmd_802_11_ad_hoc_start() 1010 if (!adhoc_start->data_rate[i]) in mwifiex_cmd_802_11_ad_hoc_start() 1017 &adhoc_start->data_rate, priv->curr_bss_params.num_of_rates); in mwifiex_cmd_802_11_ad_hoc_start() 1020 adhoc_start->data_rate); in mwifiex_cmd_802_11_ad_hoc_start()
|
| /drivers/staging/rtl8723bs/hal/ |
| A D | rtl8723bs_recv.c | 63 pattrib->data_rate = (u8)prxreport->rx_rate; in update_recvframe_attrib() 91 .data_rate = 0x00, in update_recvframe_phyinfo() 126 pkt_info.data_rate = pattrib->data_rate; in update_recvframe_phyinfo()
|
| A D | odm_HWConfig.c | 115 is_cck_rate = pkt_info->data_rate <= DESC_RATE11M; in odm_rx_phy_status_parsing() 276 isCCKrate = ((pPktinfo->data_rate <= DESC_RATE11M)) ? true : false; in odm_Process_RSSIForDM() 277 pDM_Odm->RxRate = pPktinfo->data_rate; in odm_Process_RSSIForDM()
|
| /drivers/net/wireless/realtek/rtw89/ |
| A D | core.c | 1681 return rtw89_get_data_nss(rtwdev, data_rate) + 1; in rtw89_get_data_rate_nss() 2050 u16 data_rate; in rtw89_core_rx_ppdu_match() local 2053 data_rate = desc_info->data_rate; in rtw89_core_rx_ppdu_match() 2063 rate_idx = rtw89_get_data_mcs(rtwdev, data_rate); in rtw89_core_rx_ppdu_match() 2283 pkt_stat->beacon_rate = desc_info->data_rate; in rtw89_vif_rx_stats_iter() 2289 if (desc_info->data_rate < RTW89_HW_RATE_NR) in rtw89_vif_rx_stats_iter() 2290 pkt_stat->rx_rate_cnt[desc_info->data_rate]++; in rtw89_vif_rx_stats_iter() 2602 .rate = desc_info->data_rate, in rtw89_core_rx_process_ppdu_sts() 2796 rtwsta_link->rx_hw_rate = desc_info->data_rate; in rtw89_core_stats_sta_rx_status_iter() 2828 u16 data_rate; in rtw89_core_update_rx_status() local [all …]
|
| /drivers/input/misc/ |
| A D | adxl34x.c | 224 .data_rate = 8, 532 return sprintf(buf, "%u\n", RATE(ac->pdata.data_rate)); in adxl34x_rate_show() 549 ac->pdata.data_rate = RATE(val); in adxl34x_rate_store() 551 ac->pdata.data_rate | in adxl34x_rate_store() 824 AC_WRITE(ac, BW_RATE, RATE(ac->pdata.data_rate) | in adxl34x_probe()
|
| /drivers/iio/proximity/ |
| A D | irsd200.c | 323 int data_rate; in irsd200_write_timer() local 330 ret = irsd200_read_data_rate(data, &data_rate); in irsd200_write_timer() 335 regval = val * data_rate + (val2 * data_rate) / 1000000; in irsd200_write_timer()
|
| /drivers/gpu/drm/kmb/ |
| A D | kmb_dsi.c | 1358 u64 data_rate; in kmb_dsi_mode_set() local 1381 data_rate = ((((u32)mode->crtc_vtotal * (u32)mode->crtc_htotal) * in kmb_dsi_mode_set() 1386 (u32)data_rate, mipi_tx_init_cfg.active_lanes); in kmb_dsi_mode_set() 1391 if (data_rate < 800) { in kmb_dsi_mode_set() 1393 mipi_tx_init_cfg.lane_rate_mbps = data_rate * 2; in kmb_dsi_mode_set() 1395 mipi_tx_init_cfg.lane_rate_mbps = data_rate; in kmb_dsi_mode_set()
|
| /drivers/tty/ |
| A D | synclink_gt.c | 336 .data_rate = 9600, 842 if (info->params.data_rate) { in wait_until_sent() 1078 tmp_params.data_rate = (compat_ulong_t)info->params.data_rate; in get_params32() 1109 info->params.data_rate = tmp_params.data_rate; in set_params32() 2477 if (info->params.data_rate) { in change_params() 2479 info->params.data_rate; in change_params() 4128 set_rate(info, info->params.data_rate * 8); in async_mode() 4864 u32 speed = info->params.data_rate; in irq_test() 4866 info->params.data_rate = 921600; in irq_test() 4894 info->params.data_rate = speed; in irq_test() [all …]
|
| /drivers/phy/freescale/ |
| A D | phy-fsl-imx8-mipi-dphy.c | 386 unsigned long data_rate; in mixel_dphy_configure_lvds_phy() local 416 data_rate = 7 * lvds_opts->differential_clk_rate; in mixel_dphy_configure_lvds_phy() 418 fvco = data_rate * co; in mixel_dphy_configure_lvds_phy()
|
| /drivers/gpu/drm/amd/display/dc/ |
| A D | dm_services_types.h | 301 uint32_t data_rate; member
|
| /drivers/gpu/drm/mediatek/ |
| A D | mtk_dsi.c | 213 u32 data_rate; member 248 u32 data_rate_mhz = DIV_ROUND_UP(dsi->data_rate, HZ_PER_MHZ); in mtk_dsi_phy_timconfig() 691 dsi->data_rate = DIV_ROUND_UP_ULL(dsi->vm.pixelclock * bit_per_pixel, in mtk_dsi_poweron() 694 ret = clk_set_rate(dsi->hs_clk, dsi->data_rate); in mtk_dsi_poweron()
|
| /drivers/gpu/drm/bridge/imx/ |
| A D | imx93-mipi-dsi.c | 213 static inline unsigned long data_rate_to_fout(unsigned long data_rate) in data_rate_to_fout() argument 216 return data_rate / 2; in data_rate_to_fout()
|