Searched refs:dc_mode_limit (Results 1 – 6 of 6) sorted by relevance
104 if (config->use_clock_dc_limits && dc_bw_params->dc_mode_limit.dcfclk_mhz && in override_dml_init_with_values_from_smu()105 dc_clk_table->entries[i].dcfclk_mhz > dc_bw_params->dc_mode_limit.dcfclk_mhz) { in override_dml_init_with_values_from_smu()127 if (config->use_clock_dc_limits && dc_bw_params->dc_mode_limit.fclk_mhz && in override_dml_init_with_values_from_smu()128 dc_clk_table->entries[i].fclk_mhz > dc_bw_params->dc_mode_limit.fclk_mhz) { in override_dml_init_with_values_from_smu()150 if (config->use_clock_dc_limits && dc_bw_params->dc_mode_limit.memclk_mhz && in override_dml_init_with_values_from_smu()151 dc_clk_table->entries[i].memclk_mhz > dc_bw_params->dc_mode_limit.memclk_mhz) { in override_dml_init_with_values_from_smu()173 if (config->use_clock_dc_limits && dc_bw_params->dc_mode_limit.dispclk_mhz && in override_dml_init_with_values_from_smu()196 if (config->use_clock_dc_limits && dc_bw_params->dc_mode_limit.dppclk_mhz && in override_dml_init_with_values_from_smu()197 dc_clk_table->entries[i].dppclk_mhz > dc_bw_params->dc_mode_limit.dppclk_mhz) { in override_dml_init_with_values_from_smu()219 if (config->use_clock_dc_limits && dc_bw_params->dc_mode_limit.dtbclk_mhz && in override_dml_init_with_values_from_smu()[all …]
250 clk_mgr_base->bw_params->dc_mode_limit.dcfclk_mhz = 0; in dcn401_init_clocks()259 clk_mgr_base->bw_params->dc_mode_limit.socclk_mhz = 0; in dcn401_init_clocks()269 clk_mgr_base->bw_params->dc_mode_limit.dtbclk_mhz = 0; in dcn401_init_clocks()279 clk_mgr_base->bw_params->dc_mode_limit.dispclk_mhz = 0; in dcn401_init_clocks()320 clk_mgr_base->bw_params->dc_mode_limit.dcfclk_mhz) || in dcn401_is_dc_mode_present()322 clk_mgr_base->bw_params->dc_mode_limit.dispclk_mhz) || in dcn401_is_dc_mode_present()324 clk_mgr_base->bw_params->dc_mode_limit.dtbclk_mhz) || in dcn401_is_dc_mode_present()326 clk_mgr_base->bw_params->dc_mode_limit.fclk_mhz) || in dcn401_is_dc_mode_present()328 clk_mgr_base->bw_params->dc_mode_limit.memclk_mhz) || in dcn401_is_dc_mode_present()330 clk_mgr_base->bw_params->dc_mode_limit.socclk_mhz)); in dcn401_is_dc_mode_present()[all …]
194 …clk_mgr_base->bw_params->dc_mode_limit.dcfclk_mhz = dcn30_smu_get_dc_mode_max_dpm_freq(clk_mgr, PP… in dcn32_init_clocks()200 …clk_mgr_base->bw_params->dc_mode_limit.socclk_mhz = dcn30_smu_get_dc_mode_max_dpm_freq(clk_mgr, PP… in dcn32_init_clocks()207 clk_mgr_base->bw_params->dc_mode_limit.dtbclk_mhz = in dcn32_init_clocks()218 if (clk_mgr_base->bw_params->dc_mode_limit.dispclk_mhz > 1950) in dcn32_init_clocks()219 clk_mgr_base->bw_params->dc_mode_limit.dispclk_mhz = 1950; in dcn32_init_clocks()226 …clk_mgr_base->bw_params->dc_mode_limit.dppclk_mhz = dcn30_smu_get_dc_mode_max_dpm_freq(clk_mgr, PP… in dcn32_init_clocks()228 if (clk_mgr_base->bw_params->dc_mode_limit.dppclk_mhz > 1950) in dcn32_init_clocks()229 clk_mgr_base->bw_params->dc_mode_limit.dppclk_mhz = 1950; in dcn32_init_clocks()1039 …clk_mgr_base->bw_params->dc_mode_limit.memclk_mhz = dcn30_smu_get_dc_mode_max_dpm_freq(clk_mgr, PP… in dcn32_get_memclk_states_from_smu()1040 …clk_mgr_base->bw_params->dc_mode_softmax_memclk = clk_mgr_base->bw_params->dc_mode_limit.memclk_mh… in dcn32_get_memclk_states_from_smu()[all …]
382 if (bw_params->clk_table.entries[i].memclk_mhz <= bw_params->dc_mode_limit.memclk_mhz) in build_synthetic_soc_states()387 if (bw_params->clk_table.entries[i].fclk_mhz <= bw_params->dc_mode_limit.fclk_mhz) in build_synthetic_soc_states()392 if (bw_params->clk_table.entries[i].dcfclk_mhz <= bw_params->dc_mode_limit.dcfclk_mhz) in build_synthetic_soc_states()399 override_max_clk_values(&bw_params->dc_mode_limit, &max_clk_data); in build_synthetic_soc_states()
269 struct clk_limit_table_entry dc_mode_limit; member
2840 if (bw_params->clk_table.entries[i].memclk_mhz <= bw_params->dc_mode_limit.memclk_mhz) in build_synthetic_soc_states()2845 if (bw_params->clk_table.entries[i].fclk_mhz <= bw_params->dc_mode_limit.fclk_mhz) in build_synthetic_soc_states()2850 if (bw_params->clk_table.entries[i].dcfclk_mhz <= bw_params->dc_mode_limit.dcfclk_mhz) in build_synthetic_soc_states()2857 override_max_clk_values(&bw_params->dc_mode_limit, &max_clk_data); in build_synthetic_soc_states()
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