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Searched refs:dc_state (Results 1 – 25 of 166) sorted by relevance

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/drivers/gpu/drm/amd/display/dc/
A Ddc_state_priv.h48 struct dc_state *state,
51 struct dc_state *state,
56 struct dc_state *state,
59 struct dc_state *state,
64 struct dc_state *state,
68 struct dc_state *state,
75 struct dc_state *state);
81 struct dc_state *state);
86 struct dc_state *state,
110 struct dc_state *state,
[all …]
A Ddc_state.h32 void dc_state_copy(struct dc_state *dst_state, struct dc_state *src_state);
33 struct dc_state *dc_state_create_copy(struct dc_state *src_state);
38 void dc_state_retain(struct dc_state *state);
39 void dc_state_release(struct dc_state *state);
42 struct dc_state *state,
47 struct dc_state *state,
54 struct dc_state *state);
60 struct dc_state *state);
65 struct dc_state *state);
72 struct dc_state *state);
[all …]
/drivers/gpu/drm/amd/display/dc/hwss/
A Dhw_sequencer.h36 struct dc_state;
220 struct dc_state *context);
222 struct dc_state *context);
229 struct dc_state *context);
231 struct dc_state *context);
233 struct dc_state *context);
271 struct dc_state *state,
350 struct dc_state *context,
408 struct dc_state *context,
516 struct dc_state *context,
[all …]
A Dhw_sequencer_private.h56 struct dc_state;
78 void (*init_pipes)(struct dc *dc, struct dc_state *context);
81 struct dc_state *state,
102 struct dc_state *context,
145 struct dc_state *context);
151 struct dc_state *context);
160 void (*PLAT_58856_wa)(struct dc_state *context,
164 struct dc_state *context);
172 struct dc_state *context,
176 struct dc_state *context,
[all …]
/drivers/gpu/drm/amd/display/dc/dml2/
A Ddml2_wrapper.h79 struct dc_state *new_ctx,
85 struct dc_state *new_ctx,
105 struct dc_state *state,
118 struct dc_state *state,
121 struct dc_state *state,
124 struct dc_state *state,
133 struct dc_state *state,
136 struct dc_state *state,
139 struct dc_state *state,
147 struct dc_state *state);
[all …]
A Ddml2_utils.h34 struct dc_state;
41 void dml2_copy_clocks_to_dc_state(struct dml2_dcn_clocks *out_clks, struct dc_state *context);
43 void dml2_extract_writeback_wm(struct dc_state *context, struct display_mode_lib_st *dml_core_ctx);
45 bool is_dtbclk_required(const struct dc *dc, struct dc_state *context);
71 void dml2_dc_construct_pipes(struct dc_state *context, struct dml_mode_support_info_st *dml_mode_su…
84 bool dml2_predict_pipe_split(struct dc_state *context, display_pipe_params_st pipe, int index);
96 enum dc_status dml2_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc_…
122 void dml2_calculate_rq_and_dlg_params(const struct dc *dc, struct dc_state *context, struct resourc…
141 bool dml2_verify_det_buffer_configuration(struct dml2_context *in_ctx, struct dc_state *display_sta…
A Ddml2_dc_resource_mgmt.c536 struct dc_state *state, in add_odm_slice_to_odm_tree()
560 struct dc_state *state, in add_plane_to_blend_tree()
794 struct dc_state *state, in get_target_mpc_factor()
852 struct dc_state *state, in get_target_odm_factor()
898 struct dc_state *state, in get_source_odm_factor()
910 struct dc_state *state, in get_source_mpc_factor()
926 struct dc_state *state, in populate_mpc_factors_for_stream()
944 struct dc_state *state, in populate_odm_factors()
957 struct dc_state *state, in unmap_dc_pipes_for_stream()
986 struct dc_state *state, in map_dc_pipes_for_stream()
[all …]
A Ddml2_mall_phantom.h42 unsigned int dml2_helper_calculate_num_ways_for_subvp(struct dml2_context *ctx, struct dc_state *co…
44 bool dml2_svp_add_phantom_pipe_to_dc_state(struct dml2_context *ctx, struct dc_state *state, struct…
46 bool dml2_svp_remove_all_phantom_pipes(struct dml2_context *ctx, struct dc_state *state);
48 bool dml2_svp_validate_static_schedulability(struct dml2_context *ctx, struct dc_state *context, en…
50 bool dml2_svp_drr_schedulable(struct dml2_context *ctx, struct dc_state *context, struct dc_crtc_ti…
/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
A Ddcn32_hwseq.h48 void dcn32_commit_subvp_config(struct dc *dc, struct dc_state *context);
68 void dcn32_update_mall_sel(struct dc *dc, struct dc_state *context);
70 void dcn32_update_force_pstate(struct dc *dc, struct dc_state *context);
81 struct dc_state *context,
101 struct dc_state *context,
111 struct dc_state *context,
123 const struct dc_state *cur_ctx,
124 const struct dc_state *new_ctx);
127 struct dc_state *context);
130 struct dc_state *context, bool lock);
[all …]
/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
A Ddcn401_hwseq.h49 struct dc_state *context,
70 struct dc_state *context);
74 struct dc_state *context);
77 struct dc_state *context,
83 void dcn401_update_odm(struct dc *dc, struct dc_state *context,
92 struct dc_state *context);
95 struct dc_state *context);
99 struct dc_state *context);
103 bool dcn401_update_bandwidth(struct dc *dc, struct dc_state *context);
105 struct dc_state *old_state,
[all …]
/drivers/gpu/drm/amd/display/dc/inc/
A Dresource.h109 struct dc_state *context,
120 struct dc_state *context);
159 struct dc_state *context,
310 struct dc_state *new_ctx,
311 struct dc_state *cur_ctx,
322 struct dc_state *context,
342 struct dc_state *new_ctx,
366 struct dc_state *new_ctx,
609 struct dc_state *context,
613 struct dc_state *context,
[all …]
A Dcore_types.h65 struct dc_state;
110 struct dc_state *context,
122 struct dc_state *state,
132 struct dc_state *state,
137 struct dc_state *context);
141 struct dc_state *new_ctx,
147 struct dc_state *new_ctx,
161 struct dc_state *new_ctx,
184 struct dc_state *context,
224 struct dc_state *state,
[all …]
A Dlink_enc_cfg.h40 struct dc_state *state);
45 void link_enc_cfg_copy(const struct dc_state *src_ctx, struct dc_state *dst_ctx);
59 struct dc_state *state,
70 struct dc_state *state,
111 bool link_enc_cfg_validate(struct dc *dc, struct dc_state *state);
118 void link_enc_cfg_set_transient_mode(struct dc *dc, struct dc_state *current_state, struct dc_state
/drivers/gpu/drm/amd/display/dc/core/
A Ddc_state.c196 struct dc_state *state; in dc_state_create()
226 void dc_state_copy(struct dc_state *dst_state, struct dc_state *src_state) in dc_state_copy()
250 struct dc_state *dc_state_create_copy(struct dc_state *src_state) in dc_state_create_copy()
350 struct dc_state *state = container_of(kref, struct dc_state, refcount); in dc_state_free()
375 struct dc_state *state, in dc_state_add_stream()
404 struct dc_state *state, in dc_state_remove_stream()
467 struct dc_state *state) in dc_state_add_plane()
535 struct dc_state *state) in dc_state_remove_plane()
595 struct dc_state *state) in dc_state_rem_all_planes_for_stream()
629 struct dc_state *state) in dc_state_add_all_planes_for_stream()
[all …]
/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
A Ddcn20_hwseq.h39 struct dc_state *context);
42 struct dc_state *context);
72 struct dc_state *context);
75 struct dc_state *context);
78 struct dc_state *context);
81 struct dc_state *context);
84 struct dc_state *context,
92 struct dc_state *context);
117 struct dc_state *context);
165 struct dc_state *context);
[all …]
/drivers/gpu/drm/amd/display/dc/resource/dcn20/
A Ddcn20_resource.h62 const struct dc_state *cur_ctx,
63 struct dc_state *new_ctx,
66 void dcn20_release_pipe(struct dc_state *context,
119 struct dc_state *context,
122 enum dc_status dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, enum dc_validate_m…
125 struct dc_state *context);
128 struct dc_state *context,
135 bool dcn20_validate_dsc(struct dc *dc, struct dc_state *new_ctx);
156 struct dc_state *context,
164 enum dc_status dcn20_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_st…
[all …]
/drivers/gpu/drm/amd/display/dc/resource/dcn30/
A Ddcn30_resource.h50 struct dc_state *context,
59 enum dc_status dcn30_validate_bandwidth(struct dc *dc, struct dc_state *context,
63 struct dc_state *context,
70 struct dc *dc, struct dc_state *context,
74 void dcn30_update_soc_for_wm_a(struct dc *dc, struct dc_state *context);
79 struct dc *dc, struct dc_state *context,
98 struct dc_state *new_ctx,
103 bool dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, struct dc_state *co…
104 void dcn30_setup_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, struct dc_state *context);
105 int dcn30_find_dummy_latency_index_for_fw_based_mclk_switch(struct dc *dc, struct dc_state *context,
/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
A Ddcn10_hwseq.h45 struct dc_state *context,
49 struct dc_state *context);
52 struct dc_state *context);
84 struct dc_state *context);
88 struct dc_state *context,
92 struct dc_state *context);
110 struct dc_state *context);
117 struct dc_state *context);
119 struct dc_state *state,
127 struct dc_state *state,
[all …]
/drivers/gpu/drm/amd/display/dc/dml/dcn32/
A Ddcn32_fpu.h35 struct dc_state *context,
40 struct dc_state *context,
48 struct dc_state *context,
54 void dcn32_calculate_wm_and_dlg_fpu(struct dc *dc, struct dc_state *context,
62 struct dc_state *context,
72 void dcn32_assign_fpo_vactive_candidate(struct dc *dc, const struct dc_state *context, struct dc_st…
74 bool dcn32_find_vactive_pipe(struct dc *dc, const struct dc_state *context, struct dc_stream_state …
76 void dcn32_override_min_req_memclk(struct dc *dc, struct dc_state *context);
/drivers/gpu/drm/amd/display/dc/dml2/dml21/
A Ddml21_utils.h9 struct dc_state;
20 bool dml21_get_plane_id(const struct dc_state *state, const struct dc_plane_state *plane, unsigned …
22 struct dc_state *context,
25 void dml21_populate_mall_allocation_size(struct dc_state *context,
34 struct dc_state *context,
40 struct dc_state *context,
44 void dml21_handle_phantom_streams_planes(const struct dc *in_dc, struct dc_state *context, struct d…
47 struct dc_state *context,
A Ddml21_translation_helper.h10 struct dc_state;
21 bool dml21_map_dc_state_into_dml_display_cfg(const struct dc *in_dc, struct dc_state *context, stru…
22 void dml21_copy_clocks_to_dc_state(struct dml2_context *in_ctx, struct dc_state *context);
25 void dml21_get_pipe_mcache_config(struct dc_state *context, struct pipe_ctx *pipe_ctx, struct dml2_…
27 …l_ctx, unsigned int stream_id, const struct dc_plane_state *plane, const struct dc_state *context);
/drivers/gpu/drm/amd/display/dc/hwss/dcn35/
A Ddcn35_hwseq.h34 void dcn35_update_odm(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx);
60 void dcn35_init_pipes(struct dc *dc, struct dc_state *context);
63 struct dc_state *context);
64 void dcn35_disable_plane(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx);
66 void dcn35_calc_blocks_to_gate(struct dc *dc, struct dc_state *context,
68 void dcn35_calc_blocks_to_ungate(struct dc *dc, struct dc_state *context,
79 struct dc_state *context);
83 struct dc_state *context);
/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddcn20_fpu.h36 struct dc_state *context,
40 struct dc_state *context,
45 struct dc_state *context,
49 struct dc_state *context,
64 bool dcn20_validate_bandwidth_fp(struct dc *dc, struct dc_state *context,
76 struct dc_state *context,
79 bool dcn21_validate_bandwidth_fp(struct dc *dc, struct dc_state *context, enum
/drivers/gpu/drm/amd/display/dc/hwss/dce110/
A Ddce110_hwseq.h33 struct dc_state;
40 struct dc_state *context);
44 struct dc_state *context,
62 void dce110_enable_accelerated_mode(struct dc *dc, struct dc_state *context);
72 struct dc_state *context);
76 struct dc_state *context);
114 struct dc_state *state,
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
A Ddcn20_clk_mgr.h30 struct dc_state *context,
34 struct dc_state *context,
37 struct dc_state *context, bool safe_to_lower);
49 struct dc_state *context,
54 struct dc_state *context);

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