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Searched refs:dc_status (Results 1 – 25 of 80) sorted by relevance

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/drivers/gpu/drm/amd/display/dc/link/protocols/
A Dlink_dp_training.h58 enum dc_status dpcd_set_training_pattern(
63 enum dc_status dpcd_set_lane_settings(
69 enum dc_status dpcd_set_link_settings(
80 enum dc_status dp_get_lane_status_and_lane_adjust(
88 enum dc_status dpcd_configure_lttpr_mode(
92 enum dc_status configure_lttpr_mode_transparent(struct dc_link *link);
94 enum dc_status dpcd_configure_channel_coding(
199 enum dc_status status);
A Dlink_dp_training_dpia.c103 enum dc_status status; in dpia_configure_link()
205 enum dc_status status = DC_OK; in convert_trng_ptn_to_trng_stg()
234 static enum dc_status dpcd_set_lt_pattern( in dpcd_set_lt_pattern()
241 enum dc_status status; in dpcd_set_lt_pattern()
295 enum dc_status status = DC_ERROR_UNEXPECTED; in dpia_training_cr_non_transparent()
461 enum dc_status status; in dpia_training_cr_transparent()
591 enum dc_status status = DC_ERROR_UNEXPECTED; in dpia_training_eq_non_transparent()
735 enum dc_status status; in dpia_training_eq_transparent()
826 static enum dc_status dpcd_clear_lt_pattern( in dpcd_clear_lt_pattern()
832 enum dc_status status; in dpcd_clear_lt_pattern()
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A Dlink_dpcd.c44 static enum dc_status internal_link_read_dpcd( in internal_link_read_dpcd()
59 static enum dc_status internal_link_write_dpcd( in internal_link_write_dpcd()
197 enum dc_status core_link_read_dpcd( in core_link_read_dpcd()
209 enum dc_status status = DC_ERROR_UNEXPECTED; in core_link_read_dpcd()
230 enum dc_status core_link_write_dpcd( in core_link_write_dpcd()
238 enum dc_status status = DC_ERROR_UNEXPECTED; in core_link_write_dpcd()
A Dlink_dp_irq_handler.c51 enum dc_status dpcd_result = DC_ERROR_UNEXPECTED; in dp_parse_link_loss_status()
293 enum dc_status retval; in dp_handle_tunneling_irq()
317 enum dc_status retval; in read_dpcd204h_on_irq_hpd()
334 enum dc_status dp_read_hpd_rx_irq_data( in dp_read_hpd_rx_irq_data()
338 static enum dc_status retval; in dp_read_hpd_rx_irq_data()
416 enum dc_status result; in dp_handle_hpd_rx_irq()
A Dlink_dpcd.h31 enum dc_status core_link_read_dpcd(
37 enum dc_status core_link_write_dpcd(
A Dlink_dp_training.c548 enum dc_status status) in dp_check_dpcd_reqeust_status()
607 enum dc_status status; in dp_get_lane_status_and_lane_adjust()
983 enum dc_status status = DC_OK; in dpcd_configure_lttpr_mode()
1019 enum dc_status status; in dpcd_exit_training_mode()
1048 enum dc_status status; in dpcd_configure_channel_coding()
1063 enum dc_status dpcd_set_training_pattern( in dpcd_set_training_pattern()
1067 enum dc_status status; in dpcd_set_training_pattern()
1088 enum dc_status dpcd_set_link_settings( in dpcd_set_link_settings()
1093 enum dc_status status; in dpcd_set_link_settings()
1178 enum dc_status dpcd_set_lane_settings( in dpcd_set_lane_settings()
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A Dlink_dp_training_128b_132b.c39 static enum dc_status dpcd_128b_132b_set_lane_settings( in dpcd_128b_132b_set_lane_settings()
43 enum dc_status status = core_link_write_dpcd(link, in dpcd_128b_132b_set_lane_settings()
82 enum dc_status status = DC_OK; in dp_perform_128b_132b_channel_eq_done_sequence()
162 enum dc_status status = DC_OK; in dp_perform_128b_132b_cds_done_sequence()
A Dlink_dp_dpia.c49 enum dc_status dpcd_get_tunneling_device_data(struct dc_link *link) in dpcd_get_tunneling_device_data()
51 enum dc_status status = DC_OK; in dpcd_get_tunneling_device_data()
A Dlink_dp_phy.c138 enum dc_status dp_set_fec_ready(struct dc_link *link, const struct link_resource *link_res, bool re… in dp_set_fec_ready()
146 enum dc_status status = DC_OK; in dp_set_fec_ready()
/drivers/gpu/drm/amd/display/dc/resource/dcn20/
A Ddcn20_resource.h122 enum dc_status dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, enum dc_validate_m…
163 enum dc_status dcn20_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc…
164 enum dc_status dcn20_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_st…
165 enum dc_status dcn20_add_dsc_to_stream_resource(struct dc *dc, struct dc_state *dc_ctx, struct dc_s…
166 enum dc_status dcn20_remove_stream_from_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stre…
167 enum dc_status dcn20_patch_unknown_plane_state(struct dc_plane_state *plane_state);
/drivers/gpu/drm/amd/display/dc/resource/dce112/
A Ddce112_resource.h38 enum dc_status dce112_validate_with_context(
45 enum dc_status dce112_validate_bandwidth(
50 enum dc_status dce112_add_stream_to_ctx(
/drivers/gpu/drm/amd/display/dc/inc/
A Dcore_types.h84 enum dc_status (*validate_bandwidth)(
135 enum dc_status (*validate_global)(
155 enum dc_status (*validate_plane)(
159 enum dc_status (*add_stream_to_ctx)(
164 enum dc_status (*remove_stream_from_ctx)(
169 enum dc_status (*patch_unknown_plane_state)(
204 enum dc_status (*add_dsc_to_stream_resource)(
228 enum dc_status (*update_dc_state_for_encoder_switch)(struct dc_link *link,
A Dresource.h107 enum dc_status resource_map_pool_resources(
118 enum dc_status resource_build_scaling_params_for_context(
291 enum dc_status resource_add_otg_master_for_stream_output(struct dc_state *new_ctx,
576 enum dc_status resource_map_clock_resources(
581 enum dc_status resource_map_phy_clock_resources(
635 enum dc_status update_dp_encoder_resources_for_test_harness(const struct dc *dc,
A Dlink.h140 enum dc_status (*validate_mode_timing)(
147 enum dc_status (*validate_dp_tunnel_bandwidth)(
163 enum dc_status (*increase_mst_payload)(
165 enum dc_status (*reduce_mst_payload)(
239 enum dc_status (*dp_read_hpd_rx_irq_data)(
A Dcore_status.h31 enum dc_status { enum
66 char *dc_status_to_str(enum dc_status status);
/drivers/gpu/drm/amd/display/dc/link/
A Dlink_validation.h29 enum dc_status link_validate_mode_timing(
33 enum dc_status link_validate_dp_tunnel_bandwidth(
A Dlink_dpms.h43 enum dc_status link_increase_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t req_pbn);
44 enum dc_status link_reduce_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t req_pbn);
A Dlink_dpms.c81 enum dc_status status = DC_ERROR_UNEXPECTED; in link_blank_all_dp_displays()
104 enum dc_status status = DC_ERROR_UNEXPECTED; in link_blank_all_edp_displays()
1656 static enum dc_status update_sst_payload(struct pipe_ctx *pipe_ctx, in update_sst_payload()
2036 static enum dc_status enable_link_dp(struct dc_state *state, in enable_link_dp()
2040 enum dc_status status; in enable_link_dp()
2154 static enum dc_status enable_link_edp( in enable_link_edp()
2180 static enum dc_status enable_link_dp_mst( in enable_link_dp_mst()
2209 static enum dc_status enable_link_virtual(struct pipe_ctx *pipe_ctx) in enable_link_virtual()
2221 static enum dc_status enable_link( in enable_link()
2225 enum dc_status status = DC_ERROR_UNEXPECTED; in enable_link()
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/drivers/gpu/drm/amd/display/dc/resource/dce100/
A Ddce100_resource.h42 enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps…
44 enum dc_status dce100_add_stream_to_ctx(
/drivers/gpu/drm/amd/display/dc/
A Ddc_state.h41 enum dc_status dc_state_add_stream(const struct dc *dc,
45 enum dc_status dc_state_remove_stream(
A Ddc_state_priv.h63 enum dc_status dc_state_add_phantom_stream(const struct dc *dc,
67 enum dc_status dc_state_remove_phantom_stream(const struct dc *dc,
/drivers/gpu/drm/amd/display/dc/resource/dcn31/
A Ddcn31_resource.h40 enum dc_status dcn31_validate_bandwidth(struct dc *dc,
69 enum dc_status dcn31_update_dc_state_for_encoder_switch(struct dc_link *link,
/drivers/gpu/drm/amd/display/dc/hwss/dce110/
A Ddce110_hwseq.h38 enum dc_status dce110_apply_ctx_to_hw(
42 enum dc_status dce110_apply_single_controller_ctx_to_hw(
/drivers/gpu/drm/amd/display/dc/resource/dcn30/
A Ddcn30_resource.h59 enum dc_status dcn30_validate_bandwidth(struct dc *dc, struct dc_state *context,
96 enum dc_status dcn30_add_stream_to_ctx(
/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
A Ddcn10_hwseq.h43 enum dc_status dcn10_enable_stream_timing(
115 enum dc_status dce110_apply_ctx_to_hw(
189 enum dc_status dcn10_set_clock(struct dc *dc,

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