| /drivers/gpu/drm/amd/display/dc/dccg/dcn30/ |
| A D | dcn30_dccg.c | 34 (dccg_dcn->regs->reg)
38 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
41 dccg_dcn->base.ctx
61 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL); in dccg3_create() local
64 if (dccg_dcn == NULL) { in dccg3_create()
69 base = &dccg_dcn->base; in dccg3_create()
73 dccg_dcn->regs = regs; in dccg3_create()
77 return &dccg_dcn->base; in dccg3_create()
86 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL); in dccg30_create() local
89 if (dccg_dcn == NULL) { in dccg30_create()
[all …]
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| /drivers/gpu/drm/amd/display/dc/dccg/dcn20/ |
| A D | dcn20_dccg.c | 36 (dccg_dcn->regs->reg)
40 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
43 dccg_dcn->base.ctx
151 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_ATOMIC); in dccg2_create() local
154 if (dccg_dcn == NULL) { in dccg2_create()
159 base = &dccg_dcn->base; in dccg2_create()
163 dccg_dcn->regs = regs; in dccg2_create()
164 dccg_dcn->dccg_shift = dccg_shift; in dccg2_create()
165 dccg_dcn->dccg_mask = dccg_mask; in dccg2_create()
167 return &dccg_dcn->base; in dccg2_create()
[all …]
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| /drivers/gpu/drm/amd/display/dc/dccg/dcn301/ |
| A D | dcn301_dccg.c | 34 (dccg_dcn->regs->reg)
38 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
41 dccg_dcn->base.ctx
60 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL); in dccg301_create() local
63 if (dccg_dcn == NULL) { in dccg301_create()
68 base = &dccg_dcn->base; in dccg301_create()
72 dccg_dcn->regs = regs; in dccg301_create()
73 dccg_dcn->dccg_shift = dccg_shift; in dccg301_create()
74 dccg_dcn->dccg_mask = dccg_mask; in dccg301_create()
76 return &dccg_dcn->base; in dccg301_create()
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| /drivers/gpu/drm/amd/display/dc/dccg/dcn21/ |
| A D | dcn21_dccg.c | 35 (dccg_dcn->regs->reg)
39 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
42 dccg_dcn->base.ctx
48 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg21_update_dpp_dto() local
115 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL); in dccg21_create() local
118 if (dccg_dcn == NULL) { in dccg21_create()
123 base = &dccg_dcn->base; in dccg21_create()
127 dccg_dcn->regs = regs; in dccg21_create()
128 dccg_dcn->dccg_shift = dccg_shift; in dccg21_create()
129 dccg_dcn->dccg_mask = dccg_mask; in dccg21_create()
[all …]
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| /drivers/gpu/drm/amd/display/dc/dccg/dcn201/ |
| A D | dcn201_dccg.c | 35 (dccg_dcn->regs->reg)
39 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
42 dccg_dcn->base.ctx
68 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL); in dccg201_create() local
71 if (dccg_dcn == NULL) { in dccg201_create()
76 base = &dccg_dcn->base; in dccg201_create()
80 dccg_dcn->regs = regs; in dccg201_create()
81 dccg_dcn->dccg_shift = dccg_shift; in dccg201_create()
82 dccg_dcn->dccg_mask = dccg_mask; in dccg201_create()
84 return &dccg_dcn->base; in dccg201_create()
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| /drivers/gpu/drm/amd/display/dc/dccg/dcn32/ |
| A D | dcn32_dccg.c | 34 (dccg_dcn->regs->reg)
38 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
41 dccg_dcn->base.ctx
48 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg32_trigger_dio_fifo_resync() local
358 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL); in dccg32_create() local
361 if (dccg_dcn == NULL) { in dccg32_create()
366 base = &dccg_dcn->base; in dccg32_create()
370 dccg_dcn->regs = regs; in dccg32_create()
371 dccg_dcn->dccg_shift = dccg_shift; in dccg32_create()
372 dccg_dcn->dccg_mask = dccg_mask; in dccg32_create()
[all …]
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| /drivers/gpu/drm/amd/display/dc/dccg/dcn31/ |
| A D | dcn31_dccg.c | 35 (dccg_dcn->regs->reg)
39 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
42 dccg_dcn->base.ctx
84 struct dcn_dccg *dccg_dcn, in get_phy_mux_symclk() argument
738 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL); in dccg31_create() local
741 if (dccg_dcn == NULL) { in dccg31_create()
746 base = &dccg_dcn->base; in dccg31_create()
750 dccg_dcn->regs = regs; in dccg31_create()
751 dccg_dcn->dccg_shift = dccg_shift; in dccg31_create()
752 dccg_dcn->dccg_mask = dccg_mask; in dccg31_create()
[all …]
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| /drivers/gpu/drm/amd/display/dc/dccg/dcn314/ |
| A D | dcn314_dccg.c | 37 (dccg_dcn->regs->reg)
41 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
44 dccg_dcn->base.ctx
51 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg314_trigger_dio_fifo_resync() local
389 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL); in dccg314_create() local
392 if (dccg_dcn == NULL) { in dccg314_create()
397 base = &dccg_dcn->base; in dccg314_create()
401 dccg_dcn->regs = regs; in dccg314_create()
402 dccg_dcn->dccg_shift = dccg_shift; in dccg314_create()
403 dccg_dcn->dccg_mask = dccg_mask; in dccg314_create()
[all …]
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| /drivers/gpu/drm/amd/display/dc/dccg/dcn401/ |
| A D | dcn401_dccg.c | 44 (dccg_dcn->regs->reg)
48 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
51 dccg_dcn->base.ctx
58 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dcn401_set_dppclk_enable() local
897 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL); in dccg401_create() local
900 if (dccg_dcn == NULL) { in dccg401_create()
905 base = &dccg_dcn->base; in dccg401_create()
909 dccg_dcn->regs = regs; in dccg401_create()
910 dccg_dcn->dccg_shift = dccg_shift; in dccg401_create()
911 dccg_dcn->dccg_mask = dccg_mask; in dccg401_create()
[all …]
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| /drivers/gpu/drm/amd/display/dc/dccg/dcn35/ |
| A D | dcn35_dccg.c | 34 (dccg_dcn->regs->reg)
38 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
41 dccg_dcn->base.ctx
138 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg35_set_dsc_clk_rcg() local
2427 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL); in dccg35_create() local
2430 if (dccg_dcn == NULL) { in dccg35_create()
2439 base = &dccg_dcn->base; in dccg35_create()
2443 dccg_dcn->regs = regs; in dccg35_create()
2444 dccg_dcn->dccg_shift = dccg_shift; in dccg35_create()
2445 dccg_dcn->dccg_mask = dccg_mask; in dccg35_create()
[all …]
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