| /drivers/gpu/drm/amd/display/dc/resource/dcn201/ |
| A D | dcn201_resource.c | 550 static const struct dccg_registers dccg_regs = { variable
1188 pool->base.dccg = dccg201_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn201_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn321/ |
| A D | dcn321_resource.c | 507 static struct dccg_registers dccg_regs; variable
1666 #define REG_STRUCT dccg_regs in dcn321_resource_construct()
1851 pool->base.dccg = dccg32_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn321_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| A D | dcn35_resource.c | 521 static struct dccg_registers dccg_regs; variable
1823 #define REG_STRUCT dccg_regs in dcn35_resource_construct()
1992 pool->base.dccg = dccg35_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn35_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn351/ |
| A D | dcn351_resource.c | 501 static struct dccg_registers dccg_regs; variable
1795 #define REG_STRUCT dccg_regs in dcn351_resource_construct()
1963 pool->base.dccg = dccg35_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn351_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn36/ |
| A D | dcn36_resource.c | 502 static struct dccg_registers dccg_regs; variable
1796 #define REG_STRUCT dccg_regs in dcn36_resource_construct()
1965 pool->base.dccg = dccg35_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn36_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn302/ |
| A D | dcn302_resource.c | 1166 static const struct dccg_registers dccg_regs = { variable
1343 pool->dccg = dccg30_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn302_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn303/ |
| A D | dcn303_resource.c | 1111 static const struct dccg_registers dccg_regs = { variable
1276 pool->dccg = dccg30_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn303_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn21/ |
| A D | dcn21_resource.c | 224 static const struct dccg_registers dccg_regs = { variable
1510 pool->base.dccg = dccg21_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn21_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn301/ |
| A D | dcn301_resource.c | 585 static const struct dccg_registers dccg_regs = { variable
1548 pool->base.dccg = dccg301_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn301_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| A D | dcn401_resource.c | 487 static struct dccg_registers dccg_regs; variable
1844 #define REG_STRUCT dccg_regs in dcn401_resource_construct()
2045 pool->base.dccg = dccg401_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn401_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| A D | dcn32_resource.c | 511 static struct dccg_registers dccg_regs; variable
2159 #define REG_STRUCT dccg_regs in dcn32_resource_construct()
2347 pool->base.dccg = dccg32_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn32_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn316/ |
| A D | dcn316_resource.c | 653 static const struct dccg_registers dccg_regs = { variable
1869 pool->base.dccg = dccg31_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn316_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn314/ |
| A D | dcn314_resource.c | 666 static const struct dccg_registers dccg_regs = { variable
1969 pool->base.dccg = dccg314_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn314_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| A D | dcn31_resource.c | 659 static const struct dccg_registers dccg_regs = { variable
2045 pool->base.dccg = dccg31_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn31_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn315/ |
| A D | dcn315_resource.c | 658 static const struct dccg_registers dccg_regs = { variable
1993 pool->base.dccg = dccg31_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn315_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| A D | dcn30_resource.c | 614 static const struct dccg_registers dccg_regs = { variable
2432 pool->base.dccg = dccg30_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn30_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| A D | dcn20_resource.c | 643 static const struct dccg_registers dccg_regs = { variable
2529 pool->base.dccg = dccg2_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn20_resource_construct()
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