| /drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_aux.c | 442 struct ddc *ddc_pin = ddc->ddc_pin; in dce_aux_configure_timeout() local
563 struct ddc *ddc_pin = ddc->ddc_pin; in dce_aux_transfer_raw() local
572 if (ddc_pin == NULL) { in dce_aux_transfer_raw()
577 aux_engine = ddc->ctx->dc->res_pool->engines[ddc_pin->pin_data->en]; in dce_aux_transfer_raw()
578 if (!acquire(aux_engine, ddc_pin)) { in dce_aux_transfer_raw()
620 struct ddc *ddc_pin = ddc->ddc_pin; in dce_aux_transfer_dmub_raw() local
622 if (ddc_pin != NULL) { in dce_aux_transfer_dmub_raw()
625 if (!acquire(aux_engine, ddc_pin)) { in dce_aux_transfer_dmub_raw()
703 struct ddc *ddc_pin = ddc->ddc_pin; in dce_aux_transfer_with_retries() local
715 if (ddc_pin) { in dce_aux_transfer_with_retries()
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| /drivers/gpu/drm/i915/display/ |
| A D | intel_hdmi.c | 2719 u8 ddc_pin; in chv_encoder_to_ddc_pin() local
2736 return ddc_pin; in chv_encoder_to_ddc_pin()
2742 u8 ddc_pin; in bxt_encoder_to_ddc_pin() local
2756 return ddc_pin; in bxt_encoder_to_ddc_pin()
2762 u8 ddc_pin; in cnp_encoder_to_ddc_pin() local
2802 u8 ddc_pin; in mcc_encoder_to_ddc_pin() local
2884 u8 ddc_pin; in g4x_encoder_to_ddc_pin() local
2907 u8 ddc_pin; in intel_hdmi_default_ddc_pin() local
2963 u8 ddc_pin; in intel_hdmi_ddc_pin() local
3046 u8 ddc_pin; in intel_hdmi_init_connector() local
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| A D | intel_lvds.c | 850 u8 ddc_pin; in intel_lvds_init() local
877 ddc_pin = GMBUS_PIN_PANEL; in intel_lvds_init()
878 if (!intel_bios_is_lvds_present(display, &ddc_pin)) { in intel_lvds_init()
904 intel_gmbus_get_adapter(display, ddc_pin)); in intel_lvds_init()
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| A D | intel_crt.c | 1010 u8 ddc_pin; in intel_crt_init() local
1049 ddc_pin = display->vbt.crt_ddc_pin; in intel_crt_init()
1054 intel_gmbus_get_adapter(display, ddc_pin)); in intel_crt_init()
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| A D | intel_display_core.h | 242 u8 ddc_pin; member
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| A D | intel_bios.c | 1264 mapping->ddc_pin = child->ddc_pin; in parse_sdvo_device_mapping()
1270 mapping->dvo_wiring, mapping->ddc_pin, in parse_sdvo_device_mapping()
3677 if (!devdata || !devdata->child.ddc_pin) in intel_bios_hdmi_ddc_pin()
3680 return map_ddc_pin(devdata->display, devdata->child.ddc_pin); in intel_bios_hdmi_ddc_pin()
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| A D | intel_vbt_defs.h | 497 u8 ddc_pin; member
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| A D | intel_sdvo.c | 2626 ddc_bus = (mapping->ddc_pin & 0xf0) >> 4; in intel_sdvo_select_ddc_bus()
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| /drivers/gpu/drm/amd/display/dc/link/protocols/ |
| A D | link_ddc.c | 124 ddc_service->ddc_pin = NULL; in ddc_service_construct()
136 ddc_service->ddc_pin = dal_gpio_create_ddc( in ddc_service_construct()
170 if (ddc->ddc_pin) in ddc_service_destruct()
171 dal_gpio_destroy_ddc(&ddc->ddc_pin); in ddc_service_destruct()
406 !ddc->ddc_pin) { in link_aux_transfer_raw()
506 struct ddc *ddc_pin = ddc->ddc_pin; in try_to_configure_aux_timeout() local
527 if (ddc->ctx->dc->res_pool->engines[ddc_pin->pin_data->en]->funcs->configure_timeout) { in try_to_configure_aux_timeout()
528 ddc->ctx->dc->res_pool->engines[ddc_pin->pin_data->en]->funcs->configure_timeout(ddc, timeout); in try_to_configure_aux_timeout()
537 return ddc_service->ddc_pin; in get_ddc_pin()
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| A D | link_edp_panel_control.c | 781 psr_context->channel = link->ddc->ddc_pin->hw_info.ddc_channel; in edp_setup_psr()
1010 replay_context.aux_inst = link->ddc->ddc_pin->hw_info.ddc_channel; in edp_setup_replay()
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| A D | link_dp_training_dpia.c | 159 if (!link->ddc->ddc_pin && !link->aux_access_disabled && in core_link_send_set_config()
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| /drivers/gpu/drm/amd/display/dc/ |
| A D | dc_fused_io.c | 106 const uint32_t ddc_line = link->ddc->ddc_pin->pin_data->en; in dm_atomic_write_poll_read_i2c()
134 const uint32_t ddc_line = link->ddc->ddc_pin->pin_data->en; in dm_atomic_write_poll_read_aux()
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| A D | dc_ddc_types.h | 185 struct ddc *ddc_pin; member
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| /drivers/gpu/drm/gma500/ |
| A D | intel_bios.c | 384 p_mapping->ddc_pin = p_child->ddc_pin; in parse_sdvo_device_mapping()
391 p_mapping->ddc_pin, in parse_sdvo_device_mapping()
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| A D | intel_bios.h | 190 u8 ddc_pin; member
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| A D | psb_drv.h | 211 u8 ddc_pin; member
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| A D | psb_intel_sdvo.c | 1863 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); in psb_intel_sdvo_select_ddc_bus()
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| /drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_link_exports.c | 183 ddc->ddc_pin, in dc_submit_i2c()
196 ddc->ddc_pin, in dc_submit_i2c_oem()
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| A D | dc.c | 5982 if (!dc->links[link_index]->ddc->ddc_pin) in dc_process_dmub_aux_transfer_async()
6037 if (!dc->links[index]->ddc->ddc_pin) { in get_link_index_from_dpia_port_index()
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| /drivers/gpu/drm/i915/gvt/ |
| A D | opregion.c | 90 u8 ddc_pin; member
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| /drivers/gpu/drm/amd/display/dc/link/ |
| A D | link_factory.c | 603 if (!link->ddc->ddc_pin) { in construct_phy()
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| /drivers/gpu/drm/amd/display/amdgpu_dm/ |
| A D | amdgpu_dm.c | 8512 if (!ddc_service->ddc_pin) in amdgpu_dm_i2c_xfer()
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