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Searched refs:ddr (Results 1 – 25 of 33) sorted by relevance

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/drivers/media/pci/cx18/
A Dcx18-cards.c74 .ddr = {
121 .ddr = {
168 .ddr = {
221 .ddr = {
274 .ddr = {
334 .ddr = {
390 .ddr = {
439 .ddr = {
487 .ddr = {
540 .ddr = {
A Dcx18-firmware.c324 cx18_write_reg(cx, cx->card->ddr.chip_config, CX18_DDR_CHIP_CONFIG); in cx18_init_memory()
328 cx18_write_reg(cx, cx->card->ddr.refresh, CX18_DDR_REFRESH); in cx18_init_memory()
329 cx18_write_reg(cx, cx->card->ddr.timing1, CX18_DDR_TIMING1); in cx18_init_memory()
330 cx18_write_reg(cx, cx->card->ddr.timing2, CX18_DDR_TIMING2); in cx18_init_memory()
335 cx18_write_reg(cx, cx->card->ddr.tune_lane, CX18_DDR_TUNE_LANE); in cx18_init_memory()
336 cx18_write_reg(cx, cx->card->ddr.initial_emrs, CX18_DDR_INITIAL_EMRS); in cx18_init_memory()
A Dcx18-cards.h130 struct cx18_ddr ddr; member
/drivers/mtd/hyperbus/
A Drpc-if.c29 .ddr = true,
33 .ddr = true,
38 .ddr = true,
42 .ddr = true,
/drivers/memory/
A Drenesas-rpc-if.c86 u32 ddr; /* DRDRENR or SMDRENR */ member
363 rpc->ddr = 0; in rpcif_prepare_impl()
370 if (op->cmd.ddr) in rpcif_prepare_impl()
371 rpc->ddr = RPCIF_SMDRENR_HYPE(0x5); in rpcif_prepare_impl()
387 if (op->addr.ddr) in rpcif_prepare_impl()
388 rpc->ddr |= RPCIF_SMDRENR_ADDRE; in rpcif_prepare_impl()
405 if (op->option.ddr) in rpcif_prepare_impl()
406 rpc->ddr |= RPCIF_SMDRENR_OPDRE; in rpcif_prepare_impl()
425 if (op->data.ddr) in rpcif_prepare_impl()
426 rpc->ddr |= RPCIF_SMDRENR_SPIDRE; in rpcif_prepare_impl()
[all …]
/drivers/mmc/host/
A Dmeson-gx-mmc.c161 bool ddr; member
354 bool ddr) in meson_mmc_clk_set() argument
361 if (host->ddr == ddr && host->req_rate == rate) in meson_mmc_clk_set()
378 if (ddr) { in meson_mmc_clk_set()
386 host->ddr = ddr; in meson_mmc_clk_set()
399 if (ddr) { in meson_mmc_clk_set()
565 bool ddr; in meson_mmc_prepare_ios_clock() local
570 ddr = true; in meson_mmc_prepare_ios_clock()
574 ddr = false; in meson_mmc_prepare_ios_clock()
578 return meson_mmc_clk_set(host, ios->clock, ddr); in meson_mmc_prepare_ios_clock()
A Dmmci_stm32_sdmmc.c300 unsigned int clk = 0, ddr = 0; in mmci_sdmmc_set_clkreg() local
304 ddr = MCI_STM32_CLK_DDR; in mmci_sdmmc_set_clkreg()
312 if (desired >= host->mclk && !ddr) { in mmci_sdmmc_set_clkreg()
343 clk |= ddr; in mmci_sdmmc_set_clkreg()
/drivers/staging/media/atomisp/pci/runtime/isp_param/src/
A Disp_param.c176 struct ia_css_isp_param_css_segments *ddr, in ia_css_isp_param_copy_isp_mem_if_to_ddr() argument
184 ia_css_ptr ddr_mem_ptr = ddr->params[pclass][mem].address; in ia_css_isp_param_copy_isp_mem_if_to_ddr()
187 if (size != ddr->params[pclass][mem].size) in ia_css_isp_param_copy_isp_mem_if_to_ddr()
/drivers/pinctrl/nuvoton/
A Dpinctrl-npcm7xx.c572 NPCM7XX_GRP(ddr), \
707 NPCM7XX_SFUNC(ddr);
826 NPCM7XX_MKFUNC(ddr),
1019 NPCM7XX_PINCFG(110, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0),
1020 NPCM7XX_PINCFG(111, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0),
1021 NPCM7XX_PINCFG(112, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0),
1022 NPCM7XX_PINCFG(113, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0),
1120 NPCM7XX_PINCFG(208, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0),
1121 NPCM7XX_PINCFG(209, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0),
1122 NPCM7XX_PINCFG(210, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, 0),
[all …]
A Dpinctrl-npcm8xx.c755 NPCM8XX_GRP(ddr), \
993 NPCM8XX_SFUNC(ddr);
1216 NPCM8XX_MKFUNC(ddr),
1421 …NPCM8XX_PINCFG(110, rg2, MFSEL4, 24, ddr, MFSEL3, 26, rmii3, MFSEL5, 11, none, NONE, 0, none, NON…
1422 …NPCM8XX_PINCFG(111, rg2, MFSEL4, 24, ddr, MFSEL3, 26, rmii3, MFSEL5, 11, none, NONE, 0, none, NON…
1423 …NPCM8XX_PINCFG(112, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, none, NONE, 0, none, NONE, …
1424 …NPCM8XX_PINCFG(113, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, none, NONE, 0, none, NONE, …
1515 …NPCM8XX_PINCFG(208, rg2, MFSEL4, 24, ddr, MFSEL3, 26, none, NONE, 0, none, NONE, 0, none, NONE, …
1516 …NPCM8XX_PINCFG(209, rg2, MFSEL4, 24, ddr, MFSEL3, 26, rmii3, MFSEL5, 11, none, NONE, 0, none, NON…
1517 …NPCM8XX_PINCFG(210, rg2, MFSEL4, 24, ddr, MFSEL3, 26, rmii3, MFSEL5, 11, none, NONE, 0, none, NON…
[all …]
/drivers/staging/media/atomisp/pci/runtime/isp_param/interface/
A Dia_css_isp_param.h85 struct ia_css_isp_param_css_segments *ddr,
/drivers/gpio/
A Dgpio-adnp.c181 u8 ddr = 0, plr = 0, ier = 0, isr = 0; in adnp_gpio_dbg_show() local
184 err = adnp_read(adnp, GPIO_DDR(adnp) + i, &ddr); in adnp_gpio_dbg_show()
209 if (ddr & BIT(j)) in adnp_gpio_dbg_show()
/drivers/clk/meson/
A DMakefile27 obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b.o meson8-ddr.o
/drivers/mfd/
A Dsm501.c911 unsigned long ddr; in sm501_gpio_input() local
918 ddr = smc501_readl(regs + SM501_GPIO_DDR_LOW); in sm501_gpio_input()
919 smc501_writel(ddr & ~bit, regs + SM501_GPIO_DDR_LOW); in sm501_gpio_input()
938 unsigned long ddr; in sm501_gpio_output() local
952 ddr = smc501_readl(regs + SM501_GPIO_DDR_LOW); in sm501_gpio_output()
953 smc501_writel(ddr | bit, regs + SM501_GPIO_DDR_LOW); in sm501_gpio_output()
/drivers/clk/rockchip/
A DMakefile16 clk-rockchip-y += clk-ddr.o
/drivers/devfreq/event/
A DKconfig40 (DDR Monitor Module) driver to count ddr load.
/drivers/clk/davinci/
A Dpsc-da850.c111 LPSC(6, 0, ddr, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
/drivers/soc/ti/
A DKconfig40 c-states on AM335x. Also required for rtc and ddr in self-refresh low
/drivers/infiniband/hw/mlx5/
A Dumr.c682 MLX5_SET(mkc, &wqe->mkey_seg, pd, dev->ddr.pdn); in _mlx5r_umr_init_wqe()
764 cur_ksm->key = cpu_to_be32(dev->ddr.mkey); in _mlx5r_umr_update_mr_pas()
952 MLX5_SET(mkc, &wqe.mkey_seg, pd, dev->ddr.pdn); in mlx5r_umr_update_mr_page_shift()
/drivers/mmc/core/
A Dmmc.c959 int err, ddr; in mmc_select_powerclass() local
970 ddr = card->mmc_avail_type & EXT_CSD_CARD_TYPE_DDR_52; in mmc_select_powerclass()
971 if (ddr) in mmc_select_powerclass()
981 mmc_hostname(host), 1 << bus_width, ddr); in mmc_select_powerclass()
/drivers/video/fbdev/matrox/
A Dmatroxfb_misc.c670 minfo->values.memory.ddr = (bd->pins[114] & 0x60) == 0x20; in parse_pins5()
707 minfo->values.memory.ddr = 1; in default_pins5()
A Dmatroxfb_base.h488 unsigned int ddr:1, member
/drivers/memory/tegra/
A Dtegra124-emc.c1320 const unsigned int ddr = 2; in emc_icc_set() local
1329 do_div(rate, ddr * dram_data_bus_width_bytes); in emc_icc_set()
A Dtegra30-emc.c1503 const unsigned int ddr = 2; in emc_icc_set() local
1511 do_div(rate, ddr * dram_data_bus_width_bytes); in emc_icc_set()
/drivers/media/i2c/
A Dimx283.c612 const unsigned int ddr = 2; /* Double Data Rate */ in imx283_pixel_rate() local
614 u64 numerator = link_frequency * ddr * lanes; in imx283_pixel_rate()

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