Home
last modified time | relevance | path

Searched refs:degrees (Results 1 – 19 of 19) sorted by relevance

/drivers/mmc/host/
A Ddw_mmc-hi3798mv200.c94 static const int degrees[] = { 0, 45, 90, 135, 180, 225, 270, 315 }; in dw_mci_hi3798mv200_execute_tuning_mix_mode() local
108 for (i = 0; i < ARRAY_SIZE(degrees); i++) { in dw_mci_hi3798mv200_execute_tuning_mix_mode()
109 clk_set_phase(priv->sample_clk, degrees[i]); in dw_mci_hi3798mv200_execute_tuning_mix_mode()
147 fall_point = ARRAY_SIZE(degrees) - 1; in dw_mci_hi3798mv200_execute_tuning_mix_mode()
150 (ARRAY_SIZE(degrees) - 1)) in dw_mci_hi3798mv200_execute_tuning_mix_mode()
153 mid = (raise_point + ARRAY_SIZE(degrees) - 1) / 2; in dw_mci_hi3798mv200_execute_tuning_mix_mode()
162 priv->phase_map.phase[MMC_TIMING_MMC_HS200].in_deg = degrees[mid]; in dw_mci_hi3798mv200_execute_tuning_mix_mode()
163 priv->phase_map.phase[MMC_TIMING_MMC_HS400].in_deg = degrees[mid]; in dw_mci_hi3798mv200_execute_tuning_mix_mode()
164 priv->phase_map.phase[MMC_TIMING_UHS_SDR104].in_deg = degrees[mid]; in dw_mci_hi3798mv200_execute_tuning_mix_mode()
166 clk_set_phase(priv->sample_clk, degrees[mid]); in dw_mci_hi3798mv200_execute_tuning_mix_mode()
[all …]
A Ddw_mmc-hi3798cv200.c63 static const int degrees[] = { 0, 45, 90, 135, 180, 225, 270, 315 }; in dw_mci_hi3798cv200_execute_tuning() local
71 for (i = 0; i < ARRAY_SIZE(degrees); i++) { in dw_mci_hi3798cv200_execute_tuning()
72 clk_set_phase(priv->sample_clk, degrees[i]); in dw_mci_hi3798cv200_execute_tuning()
97 fall_point = ARRAY_SIZE(degrees) - 1; in dw_mci_hi3798cv200_execute_tuning()
100 (ARRAY_SIZE(degrees) - 1)) in dw_mci_hi3798cv200_execute_tuning()
103 i = (raise_point + ARRAY_SIZE(degrees) - 1) / 2; in dw_mci_hi3798cv200_execute_tuning()
108 clk_set_phase(priv->sample_clk, degrees[i]); in dw_mci_hi3798cv200_execute_tuning()
110 raise_point, fall_point, degrees[i]); in dw_mci_hi3798cv200_execute_tuning()
A Ddw_mmc-rockchip.c48 u16 degrees; in rockchip_mmc_get_internal_phase() local
61 degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90; in rockchip_mmc_get_internal_phase()
70 degrees += DIV_ROUND_CLOSEST(delay_num * factor, 1000000); in rockchip_mmc_get_internal_phase()
73 return degrees % 360; in rockchip_mmc_get_internal_phase()
87 static int rockchip_mmc_set_internal_phase(struct dw_mci *host, bool sample, int degrees) in rockchip_mmc_set_internal_phase() argument
112 nineties = degrees / 90; in rockchip_mmc_set_internal_phase()
113 remainder = (degrees % 90); in rockchip_mmc_set_internal_phase()
156 sample ? "sample" : "drv", degrees, delay_num, in rockchip_mmc_set_internal_phase()
163 static int rockchip_mmc_set_phase(struct dw_mci *host, bool sample, int degrees) in rockchip_mmc_set_phase() argument
169 return rockchip_mmc_set_internal_phase(host, sample, degrees); in rockchip_mmc_set_phase()
[all …]
A Dsdhci-of-arasan.c747 static int sdhci_zynqmp_sdcardclk_set_phase(struct clk_hw *hw, int degrees) in sdhci_zynqmp_sdcardclk_set_phase() argument
785 tap_delay = (degrees * tap_max) / 360; in sdhci_zynqmp_sdcardclk_set_phase()
813 static int sdhci_zynqmp_sampleclk_set_phase(struct clk_hw *hw, int degrees) in sdhci_zynqmp_sampleclk_set_phase() argument
854 tap_delay = (degrees * tap_max) / 360; in sdhci_zynqmp_sampleclk_set_phase()
879 static int sdhci_versal_sdcardclk_set_phase(struct clk_hw *hw, int degrees) in sdhci_versal_sdcardclk_set_phase() argument
914 tap_delay = (degrees * tap_max) / 360; in sdhci_versal_sdcardclk_set_phase()
946 static int sdhci_versal_sampleclk_set_phase(struct clk_hw *hw, int degrees) in sdhci_versal_sampleclk_set_phase() argument
981 tap_delay = (degrees * tap_max) / 360; in sdhci_versal_sampleclk_set_phase()
1007 static int sdhci_versal_net_emmc_sdcardclk_set_phase(struct clk_hw *hw, int degrees) in sdhci_versal_net_emmc_sdcardclk_set_phase() argument
1030 tap_delay = (degrees * tap_max) / 360; in sdhci_versal_net_emmc_sdcardclk_set_phase()
[all …]
/drivers/clk/rockchip/
A Dclk-mmc-phase.c53 u16 degrees; in rockchip_mmc_get_phase() local
67 degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90; in rockchip_mmc_get_phase()
76 degrees += DIV_ROUND_CLOSEST(delay_num * factor, 1000000); in rockchip_mmc_get_phase()
79 return degrees % 360; in rockchip_mmc_get_phase()
82 static int rockchip_mmc_set_phase(struct clk_hw *hw, int degrees) in rockchip_mmc_set_phase() argument
108 nineties = degrees / 90; in rockchip_mmc_set_phase()
109 remainder = (degrees % 90); in rockchip_mmc_set_phase()
153 clk_hw_get_name(hw), degrees, delay_num, in rockchip_mmc_set_phase()
A Dclk-inverter.c35 static int rockchip_inv_set_phase(struct clk_hw *hw, int degrees) in rockchip_inv_set_phase() argument
40 if (degrees % 180 == 0) { in rockchip_inv_set_phase()
41 val = !!degrees; in rockchip_inv_set_phase()
44 __func__, degrees, clk_hw_get_name(hw)); in rockchip_inv_set_phase()
/drivers/clk/meson/
A Dclk-phase.c26 static unsigned int meson_clk_degrees_to_val(int degrees, unsigned int width) in meson_clk_degrees_to_val() argument
28 unsigned int val = DIV_ROUND_CLOSEST(degrees, phase_step(width)); in meson_clk_degrees_to_val()
48 static int meson_clk_phase_set_phase(struct clk_hw *hw, int degrees) in meson_clk_phase_set_phase() argument
54 val = meson_clk_degrees_to_val(degrees, phase->ph.width); in meson_clk_phase_set_phase()
113 static int meson_clk_triphase_set_phase(struct clk_hw *hw, int degrees) in meson_clk_triphase_set_phase() argument
119 val = meson_clk_degrees_to_val(degrees, tph->ph0.width); in meson_clk_triphase_set_phase()
175 static int meson_sclk_ws_inv_set_phase(struct clk_hw *hw, int degrees) in meson_sclk_ws_inv_set_phase() argument
181 val = meson_clk_degrees_to_val(degrees, tph->ph.width); in meson_sclk_ws_inv_set_phase()
/drivers/clk/hisilicon/
A Dclk-hisi-phase.c54 int degrees) in hisi_phase_degrees_to_regval() argument
59 if (phase->phase_degrees[i] == degrees) in hisi_phase_degrees_to_regval()
65 static int hisi_clk_set_phase(struct clk_hw *hw, int degrees) in hisi_clk_set_phase() argument
72 regval = hisi_phase_degrees_to_regval(phase, degrees); in hisi_clk_set_phase()
/drivers/gpu/drm/nouveau/dispnv04/
A Doverlay.c75 sin_mul(int degrees, int factor) in sin_mul() argument
77 if (degrees > 180) { in sin_mul()
78 degrees -= 180; in sin_mul()
81 return factor * 4 * degrees * (180 - degrees) / in sin_mul()
82 (40500 - degrees * (180 - degrees)); in sin_mul()
87 cos_mul(int degrees, int factor) in cos_mul() argument
89 return sin_mul((degrees + 90) % 360, factor); in cos_mul()
/drivers/clk/sunxi-ng/
A Dccu_phase.c56 static int ccu_phase_set_phase(struct clk_hw *hw, int degrees) in ccu_phase_set_phase() argument
85 if (degrees != 180) { in ccu_phase_set_phase()
105 delay = DIV_ROUND_CLOSEST(degrees, step); in ccu_phase_set_phase()
/drivers/hwmon/
A Demc2103.c51 s8 degrees; member
88 u8 degrees, fractional; in read_temp_from_i2c() local
90 if (read_u8_from_i2c(client, i2c_reg, &degrees) < 0) in read_temp_from_i2c()
96 temp->degrees = degrees; in read_temp_from_i2c()
179 int millidegrees = data->temp[nr].degrees * 1000 in temp_show()
207 bool fault = (data->temp[nr].degrees == -128); in temp_fault_show()
/drivers/clk/sunxi/
A Dclk-mod0.c212 static int mmc_set_phase(struct clk_hw *hw, int degrees) in mmc_set_phase() argument
241 if (degrees != 180) { in mmc_set_phase()
261 delay = DIV_ROUND_CLOSEST(degrees, step); in mmc_set_phase()
/drivers/clk/starfive/
A Dclk-starfive-jh71x0.c185 static int jh71x0_clk_set_phase(struct clk_hw *hw, int degrees) in jh71x0_clk_set_phase() argument
190 if (degrees == 0) in jh71x0_clk_set_phase()
192 else if (degrees == 180) in jh71x0_clk_set_phase()
/drivers/mmc/core/
A Dhost.c223 int degrees[2] = {0}; in mmc_of_parse_timing_phase() local
226 rc = device_property_read_u32_array(dev, prop, degrees, 2); in mmc_of_parse_timing_phase()
229 phase->in_deg = degrees[0]; in mmc_of_parse_timing_phase()
230 phase->out_deg = degrees[1]; in mmc_of_parse_timing_phase()
/drivers/gpu/drm/sun4i/
A Dsun4i_tcon_dclk.c138 static int sun4i_dclk_set_phase(struct clk_hw *hw, int degrees) in sun4i_dclk_set_phase() argument
141 u32 val = degrees / 120; in sun4i_dclk_set_phase()
/drivers/clk/
A Dclk.c2997 trace_clk_set_phase(core, degrees); in clk_core_set_phase_nolock()
3000 ret = core->ops->set_phase(core->hw, degrees); in clk_core_set_phase_nolock()
3002 core->phase = degrees; in clk_core_set_phase_nolock()
3005 trace_clk_set_phase_complete(core, degrees); in clk_core_set_phase_nolock()
3030 int clk_set_phase(struct clk *clk, int degrees) in clk_set_phase() argument
3038 degrees %= 360; in clk_set_phase()
3039 if (degrees < 0) in clk_set_phase()
3040 degrees += 360; in clk_set_phase()
3047 ret = clk_core_set_phase_nolock(clk->core, degrees); in clk_set_phase()
3475 int degrees = do_div(val, 360); in clk_phase_set() local
[all …]
/drivers/gpu/ipu-v3/
A Dipu-common.c136 int ipu_degrees_to_rot_mode(enum ipu_rotate_mode *mode, int degrees, in ipu_degrees_to_rot_mode() argument
141 switch (degrees) { in ipu_degrees_to_rot_mode()
/drivers/media/platform/nxp/
A Dimx-pxp.c1423 static u8 pxp_degrees_to_rot_mode(u32 degrees) in pxp_degrees_to_rot_mode() argument
1425 switch (degrees) { in pxp_degrees_to_rot_mode()
/drivers/video/fbdev/
A DKconfig1667 and 8, 15 or 16 bpp color; 90 degrees clockwise display rotation for

Completed in 45 milliseconds