| /drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/ |
| A D | dce_clk_mgr.c | 150 * clk_mgr->base.dentist_vco_freq_khz) / target_div; in dce_get_dp_ref_freq_khz()
242 clk_mgr_dce->base.dentist_vco_freq_khz / 64); in dce_set_clock()
284 clk_mgr_dce->base.dentist_vco_freq_khz = bp->integrated_info->dentist_vco_freq; in dce_clock_read_integrated_info()
285 if (clk_mgr_dce->base.dentist_vco_freq_khz == 0) { in dce_clock_read_integrated_info()
286 clk_mgr_dce->base.dentist_vco_freq_khz = bp->fw_info.smu_gpu_pll_output_freq; in dce_clock_read_integrated_info()
287 if (clk_mgr_dce->base.dentist_vco_freq_khz == 0) in dce_clock_read_integrated_info()
288 clk_mgr_dce->base.dentist_vco_freq_khz = 3600000; in dce_clock_read_integrated_info()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| A D | rv1_clk_mgr.c | 334 clk_mgr->base.dentist_vco_freq_khz = bp->integrated_info->dentist_vco_freq; in rv1_clk_mgr_construct()
335 if (bp->fw_info_valid && clk_mgr->base.dentist_vco_freq_khz == 0) { in rv1_clk_mgr_construct()
336 clk_mgr->base.dentist_vco_freq_khz = bp->fw_info.smu_gpu_pll_output_freq; in rv1_clk_mgr_construct()
337 if (clk_mgr->base.dentist_vco_freq_khz == 0) in rv1_clk_mgr_construct()
338 clk_mgr->base.dentist_vco_freq_khz = 3600000; in rv1_clk_mgr_construct()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
| A D | dcn32_clk_mgr.c | 304 * clk_mgr->base.dentist_vco_freq_khz / new_clocks->dppclk_khz; in dcn32_update_dppclk_dispclk_freq()
309 * clk_mgr->base.dentist_vco_freq_khz / new_clocks->dispclk_khz; in dcn32_update_dppclk_dispclk_freq()
363 * clk_mgr->base.dentist_vco_freq_khz / clk_mgr->base.clks.dispclk_khz; in dcn32_update_clocks_update_dentist()
911 * clk_mgr->base.dentist_vco_freq_khz) / target_div; in dcn32_dump_clk_registers()
917 * clk_mgr->base.dentist_vco_freq_khz) / target_div; in dcn32_dump_clk_registers()
923 * clk_mgr->base.dentist_vco_freq_khz) / target_div; in dcn32_dump_clk_registers()
929 * clk_mgr->base.dentist_vco_freq_khz) / target_div; in dcn32_dump_clk_registers()
935 * clk_mgr->base.dentist_vco_freq_khz) / target_div; in dcn32_dump_clk_registers()
1190 clk_mgr->base.dentist_vco_freq_khz = dcn32_get_vco_frequency_from_reg(clk_mgr); in dcn32_clk_mgr_construct()
1193 if (clk_mgr->base.dentist_vco_freq_khz == 0) in dcn32_clk_mgr_construct()
[all …]
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
| A D | dcn201_clk_mgr.c | 206 REG_GET(CLK4_CLK_PLL_REQ, FbMult_int, &clk_mgr->base.dentist_vco_freq_khz); in dcn201_clk_mgr_construct()
207 clk_mgr->base.dentist_vco_freq_khz *= 100000; in dcn201_clk_mgr_construct()
209 if (clk_mgr->base.dentist_vco_freq_khz == 0) in dcn201_clk_mgr_construct()
210 clk_mgr->base.dentist_vco_freq_khz = 3000000; in dcn201_clk_mgr_construct()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
| A D | dcn20_clk_mgr.c | 140 * clk_mgr->base.dentist_vco_freq_khz / clk_mgr->base.clks.dppclk_khz; in dcn20_update_clocks_update_dentist()
142 * clk_mgr->base.dentist_vco_freq_khz / clk_mgr->base.clks.dispclk_khz; in dcn20_update_clocks_update_dentist()
442 * clk_mgr->base.dentist_vco_freq_khz) / disp_divider; in dcn2_read_clocks_from_hw_dentist()
445 * clk_mgr->base.dentist_vco_freq_khz) / dpp_divider; in dcn2_read_clocks_from_hw_dentist()
574 clk_mgr->base.dentist_vco_freq_khz = dc_fixpt_floor(pll_req); in dcn20_clk_mgr_construct()
577 if (clk_mgr->base.dentist_vco_freq_khz == 0) in dcn20_clk_mgr_construct()
578 clk_mgr->base.dentist_vco_freq_khz = 3850000; in dcn20_clk_mgr_construct()
582 * clk_mgr->base.dentist_vco_freq_khz) / target_div; in dcn20_clk_mgr_construct()
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_clk_mgr.c | 169 * clk_mgr_dce->dentist_vco_freq_khz) / target_div; in dce_get_dp_ref_freq_khz()
259 clk_mgr_dce->dentist_vco_freq_khz / 64); in dce_set_clock()
302 clk_mgr_dce->dentist_vco_freq_khz / 62); in dce112_set_clock()
354 clk_mgr_dce->dentist_vco_freq_khz = info.dentist_vco_freq; in dce_clock_read_integrated_info()
355 if (clk_mgr_dce->dentist_vco_freq_khz == 0) { in dce_clock_read_integrated_info()
357 clk_mgr_dce->dentist_vco_freq_khz = in dce_clock_read_integrated_info()
359 if (clk_mgr_dce->dentist_vco_freq_khz == 0) in dce_clock_read_integrated_info()
360 clk_mgr_dce->dentist_vco_freq_khz = 3600000; in dce_clock_read_integrated_info()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/ |
| A D | dce112_clk_mgr.c | 83 clk_mgr_dce->base.dentist_vco_freq_khz / 62); in dce112_set_clock()
137 clk_mgr->base.dentist_vco_freq_khz / 62); in dce112_set_dispclk()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/ |
| A D | dcn401_clk_mgr.c | 362 * clk_mgr->base.dentist_vco_freq_khz) / target_div; in dcn401_dump_clk_registers()
368 * clk_mgr->base.dentist_vco_freq_khz) / target_div; in dcn401_dump_clk_registers()
374 * clk_mgr->base.dentist_vco_freq_khz) / target_div; in dcn401_dump_clk_registers()
380 * clk_mgr->base.dentist_vco_freq_khz) / target_div; in dcn401_dump_clk_registers()
386 * clk_mgr->base.dentist_vco_freq_khz) / target_div; in dcn401_dump_clk_registers()
392 * clk_mgr->base.dentist_vco_freq_khz) / target_div; in dcn401_dump_clk_registers()
626 * clk_mgr->base.dentist_vco_freq_khz / clk_mgr->base.clks.dispclk_khz; in dcn401_update_clocks_update_dentist()
1498 return (DENTIST_DIVIDER_RANGE_SCALE_FACTOR * clk_mgr->base.dentist_vco_freq_khz) / disp_divider; in dcn401_get_dispclk_from_dentist()
1584 clk_mgr->base.dentist_vco_freq_khz = dcn401_get_vco_frequency_from_reg(clk_mgr); in dcn401_clk_mgr_construct()
1587 if (clk_mgr->base.dentist_vco_freq_khz == 0) in dcn401_clk_mgr_construct()
[all …]
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| /drivers/gpu/drm/amd/display/dc/dml/dcn302/ |
| A D | dcn302_fpu.c | 217 dcn3_02_soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0; in dcn302_fpu_update_bw_bounding_box()
218 dc->dml.soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0; in dcn302_fpu_update_bw_bounding_box()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
| A D | dcn30_clk_mgr.c | 545 clk_mgr->base.dentist_vco_freq_khz = dcn30_get_vco_frequency_from_reg(clk_mgr); in dcn3_clk_mgr_construct()
548 if (clk_mgr->base.dentist_vco_freq_khz == 0) in dcn3_clk_mgr_construct()
549 clk_mgr->base.dentist_vco_freq_khz = 3650000; in dcn3_clk_mgr_construct()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn303/ |
| A D | dcn303_fpu.c | 213 dcn3_03_soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0; in dcn303_fpu_update_bw_bounding_box()
214 dc->dml.soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0; in dcn303_fpu_update_bw_bounding_box()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| A D | dcn316_clk_mgr.c | 632 clk_mgr->base.base.dentist_vco_freq_khz = 2500000; in dcn316_clk_mgr_construct()
635 if (clk_mgr->base.base.dentist_vco_freq_khz == 0) in dcn316_clk_mgr_construct()
636 clk_mgr->base.base.dentist_vco_freq_khz = 2500000; /* 2400MHz */ in dcn316_clk_mgr_construct()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/ |
| A D | dce60_clk_mgr.c | 101 * clk_mgr->base.dentist_vco_freq_khz) / target_div; in dce60_get_dp_ref_freq_khz()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| A D | rn_clk_mgr.c | 737 clk_mgr->base.dentist_vco_freq_khz = get_vco_frequency_from_reg(clk_mgr); in rn_clk_mgr_construct()
740 if (clk_mgr->base.dentist_vco_freq_khz == 0) in rn_clk_mgr_construct()
741 clk_mgr->base.dentist_vco_freq_khz = 3600000; in rn_clk_mgr_construct()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| A D | vg_clk_mgr.c | 714 clk_mgr->base.base.dentist_vco_freq_khz = get_vco_frequency_from_reg(&clk_mgr->base); in vg_clk_mgr_construct()
717 if (clk_mgr->base.base.dentist_vco_freq_khz == 0) in vg_clk_mgr_construct()
718 clk_mgr->base.base.dentist_vco_freq_khz = 3600000; in vg_clk_mgr_construct()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
| A D | dcn301_fpu.c | 377 dcn3_01_soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0; in dcn301_fpu_update_bw_bounding_box()
378 dc->dml.soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0; in dcn301_fpu_update_bw_bounding_box()
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| /drivers/gpu/drm/amd/display/dc/inc/hw/ |
| A D | clk_mgr.h | 354 int dentist_vco_freq_khz; member
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| /drivers/gpu/drm/amd/display/dc/dml/dcn321/ |
| A D | dcn321_fpu.c | 701 dcn3_21_soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0; in dcn321_update_bw_bounding_box_fpu()
702 dc->dml.soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0; in dcn321_update_bw_bounding_box_fpu()
703 …dc->dml2_options.bbox_overrides.disp_pll_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.… in dcn321_update_bw_bounding_box_fpu()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| A D | dcn31_fpu.c | 656 dcn3_1_soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0; in dcn31_update_bw_bounding_box()
657 dc->dml.soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0; in dcn31_update_bw_bounding_box()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| A D | dcn30_fpu.c | 578 dcn3_0_soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0; in dcn30_fpu_update_bw_bounding_box()
579 dc->dml.soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0; in dcn30_fpu_update_bw_bounding_box()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| A D | dcn31_clk_mgr.c | 726 clk_mgr->base.base.dentist_vco_freq_khz = get_vco_frequency_from_reg(&clk_mgr->base); in dcn31_clk_mgr_construct()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| A D | dcn314_clk_mgr.c | 836 clk_mgr->base.base.dentist_vco_freq_khz = get_vco_frequency_from_reg(&clk_mgr->base); in dcn314_clk_mgr_construct()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| A D | dcn32_fpu.c | 3143 dcn3_2_soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0; in dcn32_update_bw_bounding_box_fpu()
3144 dc->dml.soc.dispclk_dppclk_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.0; in dcn32_update_bw_bounding_box_fpu()
3145 …dc->dml2_options.bbox_overrides.disp_pll_vco_speed_mhz = dc->clk_mgr->dentist_vco_freq_khz / 1000.… in dcn32_update_bw_bounding_box_fpu()
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| /drivers/gpu/drm/amd/display/dc/dml2/dml21/ |
| A D | dml21_translation_helper.c | 72 dml_init->soc_bb.dispclk_dppclk_vco_speed_mhz = in_dc->clk_mgr->dentist_vco_freq_khz / 1000.0; in override_dml_init_with_values_from_hardware_default()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| A D | dcn35_clk_mgr.c | 1318 clk_mgr->base.base.dentist_vco_freq_khz = get_vco_frequency_from_reg(&clk_mgr->base); in dcn35_clk_mgr_construct()
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