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Searched refs:desc_base (Results 1 – 15 of 15) sorted by relevance

/drivers/net/ethernet/sunplus/
A Dspl2sw_desc.c108 if (comm->desc_base) { in spl2sw_descs_free()
109 dma_free_coherent(&comm->pdev->dev, comm->desc_size, comm->desc_base, in spl2sw_descs_free()
111 comm->desc_base = NULL; in spl2sw_descs_free()
179 comm->desc_base = dma_alloc_coherent(&comm->pdev->dev, desc_size, &comm->desc_dma, in spl2sw_descs_alloc()
181 if (!comm->desc_base) in spl2sw_descs_alloc()
187 comm->tx_desc = comm->desc_base; in spl2sw_descs_alloc()
A Dspl2sw_define.h229 void *desc_base; member
/drivers/net/ethernet/
A Dlantiq_etop.c112 ch->dma.desc_base[ch->dma.desc].addr = in ltq_etop_alloc_skb()
115 ch->dma.desc_base[ch->dma.desc].addr = in ltq_etop_alloc_skb()
117 ch->dma.desc_base[ch->dma.desc].ctl = in ltq_etop_alloc_skb()
128 struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; in ltq_etop_hw_receive()
156 struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; in ltq_etop_poll_rx()
181 while ((ch->dma.desc_base[ch->tx_free].ctl & in ltq_etop_poll_tx()
185 memset(&ch->dma.desc_base[ch->tx_free], 0, in ltq_etop_poll_tx()
478 struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; in ltq_etop_tx()
510 if (ch->dma.desc_base[ch->dma.desc].ctl & LTQ_DMA_OWN) in ltq_etop_tx()
A Dlantiq_xrx200.c135 struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; in xrx200_flush_dma()
210 ch->dma.desc_base[ch->dma.desc].addr = mapping + NET_SKB_PAD + NET_IP_ALIGN; in xrx200_alloc_buf()
214 ch->dma.desc_base[ch->dma.desc].ctl = in xrx200_alloc_buf()
223 struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; in xrx200_hw_receive()
291 struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; in xrx200_poll_rx()
323 struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->tx_free]; in xrx200_tx_housekeeping()
332 memset(&ch->dma.desc_base[ch->tx_free], 0, in xrx200_tx_housekeeping()
362 struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; in xrx200_start_xmit()
/drivers/mmc/host/
A Dcqhci-core.c43 return cq_host->desc_base + (tag * cq_host->slot_sz); in get_desc()
220 cq_host->desc_base = dmam_alloc_coherent(mmc_dev(cq_host->mmc), in cqhci_host_alloc_tdl()
224 if (!cq_host->desc_base) in cqhci_host_alloc_tdl()
233 cq_host->desc_base, in cqhci_host_alloc_tdl()
235 cq_host->desc_base = NULL; in cqhci_host_alloc_tdl()
241 mmc_hostname(cq_host->mmc), cq_host->desc_base, cq_host->trans_desc_base, in cqhci_host_alloc_tdl()
418 cq_host->desc_base, in cqhci_disable()
422 cq_host->desc_base = NULL; in cqhci_disable()
A Dcqhci.h253 u8 *desc_base; member
/drivers/dma/amd/qdma/
A Dqdma.h163 u64 desc_base; member
209 struct qdma_mm_desc *desc_base; member
A Dqdma.c185 qdma_set_field(qdev, data, QDMA_REGF_DESC_BASE, ctxt->desc_base); in qdma_prep_sw_desc_context()
552 queue->desc_base, queue->dma_desc_base); in qdma_free_queue_resources()
574 queue->desc_base = dma_alloc_coherent(pdata->dma_dev, size, in qdma_alloc_queue_resources()
577 if (!queue->desc_base) { in qdma_alloc_queue_resources()
584 desc.desc_base = queue->dma_desc_base; in qdma_alloc_queue_resources()
589 dma_free_coherent(pdata->dma_dev, size, queue->desc_base, in qdma_alloc_queue_resources()
652 desc = q->desc_base + q->pidx; in qdma_get_desc()
/drivers/net/ethernet/mediatek/
A Dmtk_wed_wo.c325 mtk_wed_mmio_w32(wo, q->regs.desc_base, q->desc_dma); in mtk_wed_wo_queue_reset()
406 regs.desc_base = MTK_WED_WO_CCIF_DUMMY1; in mtk_wed_wo_hardware_init()
420 regs.desc_base = MTK_WED_WO_CCIF_DUMMY5; in mtk_wed_wo_hardware_init()
A Dmtk_wed_wo.h193 u32 desc_base; member
/drivers/dma/lgm/
A Dlgm-dma.c202 void *desc_base; /* Virtual address */ member
635 static void ldma_chan_desc_hw_cfg(struct ldma_chan *c, dma_addr_t desc_base, in ldma_chan_desc_hw_cfg() argument
643 writel(lower_32_bits(desc_base), d->base + DMA_CDBA); in ldma_chan_desc_hw_cfg()
647 u32 hi = upper_32_bits(desc_base) & HIGH_4_BITS; in ldma_chan_desc_hw_cfg()
659 ldma_chan_desc_cfg(struct dma_chan *chan, dma_addr_t desc_base, int desc_num) in ldma_chan_desc_cfg() argument
678 ldma_chan_desc_hw_cfg(c, desc_base, desc_num); in ldma_chan_desc_cfg()
682 c->desc_phys = desc_base; in ldma_chan_desc_cfg()
/drivers/net/ethernet/realtek/rtase/
A Drtase_main.c207 struct rtase_tx_desc *desc_base = ring->desc; in rtase_tx_clear_range() local
213 struct rtase_tx_desc *desc = desc_base + entry; in rtase_tx_clear_range()
400 union rtase_rx_desc *desc_base = ring->desc; in rtase_rx_ring_fill() local
405 union rtase_rx_desc *desc = desc_base + i; in rtase_rx_ring_fill()
487 union rtase_rx_desc *desc_base = ring->desc; in rx_handler() local
497 desc = &desc_base[entry]; in rx_handler()
/drivers/atm/
A Diphase.h676 ffreg_t desc_base; /* Base address of descriptor table */ member
730 rreg_t desc_base; /* Base address for description table */ member
/drivers/net/wireless/mediatek/mt76/
A Ddma.c191 Q_WRITE(q, desc_base, q->desc_dma); in mt76_dma_sync_idx()
A Dmt76.h207 u32 desc_base; member

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