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Searched refs:div1 (Results 1 – 18 of 18) sorted by relevance

/drivers/clk/
A Dclk-vt8500.c456 int div1, div2; in wm8750_find_pll_bits() local
462 for (div1 = 1; div1 >= 0; div1--) in wm8750_find_pll_bits()
473 *divisor1 = div1; in wm8750_find_pll_bits()
481 *divisor1 = div1; in wm8750_find_pll_bits()
504 int div1, div2; in wm8850_find_pll_bits() local
510 for (div1 = 1; div1 >= 0; div1--) in wm8850_find_pll_bits()
514 ((div1 + 1) * (1 << div2)); in wm8850_find_pll_bits()
521 *divisor1 = div1; in wm8850_find_pll_bits()
529 *divisor1 = div1; in wm8850_find_pll_bits()
550 u32 filter, mul, div1, div2; in vtwm_pll_set_rate() local
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A Dclk-rp1.c545 unsigned int div1, div2; in get_pll_prim_dividers() local
551 for (div1 = 1; div1 <= 7; div1++) { in get_pll_prim_dividers()
552 for (div2 = 1; div2 <= div1; div2++) { in get_pll_prim_dividers()
553 calc_rate = DIV_ROUND_CLOSEST(parent_rate, div1 * div2); in get_pll_prim_dividers()
557 best_div1 = div1; in get_pll_prim_dividers()
561 best_div1 = div1; in get_pll_prim_dividers()
620 u32 div1, div2; in rp1_pll_round_rate() local
622 get_pll_prim_dividers(rate, *parent_rate, &div1, &div2); in rp1_pll_round_rate()
624 return DIV_ROUND_CLOSEST(*parent_rate, div1 * div2); in rp1_pll_round_rate()
/drivers/clk/uniphier/
A Dclk-uniphier.h110 #define UNIPHIER_CLK_DIV2(parent, div0, div1) \ argument
112 UNIPHIER_CLK_DIV(parent, div1)
114 #define UNIPHIER_CLK_DIV3(parent, div0, div1, div2) \ argument
115 UNIPHIER_CLK_DIV2(parent, div0, div1), \
118 #define UNIPHIER_CLK_DIV4(parent, div0, div1, div2, div3) \ argument
119 UNIPHIER_CLK_DIV2(parent, div0, div1), \
122 #define UNIPHIER_CLK_DIV5(parent, div0, div1, div2, div3, div4) \ argument
123 UNIPHIER_CLK_DIV4(parent, div0, div1, div2, div3), \
/drivers/spi/
A Dspi-omap-uwire.c314 int div1; in uwire_setup_transfer() local
359 div1 = 2; in uwire_setup_transfer()
362 div1 = 4; in uwire_setup_transfer()
365 div1 = 7; in uwire_setup_transfer()
369 div1 = 10; in uwire_setup_transfer()
372 div2 = (rate / div1 + hz - 1) / hz; in uwire_setup_transfer()
389 rate /= div1; in uwire_setup_transfer()
/drivers/clk/imx/
A Dclk-composite-8m.c54 int div1, div2; in imx8m_clk_composite_compute_dividers() local
61 for (div1 = 1; div1 <= PCG_PREDIV_MAX; div1++) { in imx8m_clk_composite_compute_dividers()
63 int new_error = ((parent_rate / div1) / div2) - rate; in imx8m_clk_composite_compute_dividers()
66 *prediv = div1; in imx8m_clk_composite_compute_dividers()
/drivers/clk/samsung/
A Dclk-cpu.c203 unsigned long div0, div1 = 0, mux_reg; in exynos_cpuclk_pre_rate_change() local
222 div1 = cfg_data->div1; in exynos_cpuclk_pre_rate_change()
224 div1 = readl(base + regs->div_cpu1) & in exynos_cpuclk_pre_rate_change()
265 writel(div1, base + regs->div_cpu1); in exynos_cpuclk_pre_rate_change()
330 unsigned long div0, div1 = 0, mux_reg; in exynos5433_cpuclk_pre_rate_change() local
347 div1 = cfg_data->div1; in exynos5433_cpuclk_pre_rate_change()
377 writel(div1, base + regs->div_cpu1); in exynos5433_cpuclk_pre_rate_change()
A Dclk-cpu.h45 unsigned long div1; member
/drivers/media/tuners/
A Dmt2131.c89 u32 div1, num1, div2, num2; in mt2131_set_params() local
106 div1 = num1 / 8192; in mt2131_set_params()
137 b[3] = div1; in mt2131_set_params()
146 (int)div1, (int)num1, (int)div2, (int)num2); in mt2131_set_params()
A Dmt2060.c196 u32 div1,num1,div2,num2; in mt2060_set_params() local
228 div1 = num1 / 64; in mt2060_set_params()
249 b[2] = div1; in mt2060_set_params()
256 dprintk("PLL div1=%d num1=%d div2=%d num2=%d",(int)div1,(int)num1,(int)div2,(int)num2); in mt2060_set_params()
/drivers/clk/sophgo/
A Dclk-sg2044-pll.c173 unsigned int div1, div2; in sg2042_pll_compute_postdiv() local
178 for_each_pll_limit_range(div1, &limits[PLL_LIMIT_POSTDIV1]) { in sg2042_pll_compute_postdiv()
181 div1, div2); in sg2042_pll_compute_postdiv()
187 best_div1 = div1; in sg2042_pll_compute_postdiv()
/drivers/i2c/busses/
A Di2c-s3c2410.c812 unsigned int *div1, unsigned int *divs) in s3c24xx_i2c_calcdivisor() argument
831 *div1 = calc_div1; in s3c24xx_i2c_calcdivisor()
845 unsigned int divs, div1; in s3c24xx_i2c_clockrate() local
859 freq = s3c24xx_i2c_calcdivisor(clkin, target_frequency, &div1, &divs); in s3c24xx_i2c_clockrate()
874 if (div1 == 512) in s3c24xx_i2c_clockrate()
A Di2c-sprd.c339 u32 div1 = I2C_ADDR_DVD1_CALC(high, low); in sprd_i2c_set_clk() local
342 writel(div1, i2c_dev->base + ADDR_DVD1); in sprd_i2c_set_clk()
/drivers/clk/x86/
A Dclk-cgu.c395 unsigned int div0, div1, exdiv; in lgm_clk_ddiv_recalc_rate() local
400 div1 = lgm_get_clk_val(ddiv->membase, ddiv->reg, in lgm_clk_ddiv_recalc_rate()
406 do_div(prate, div1); in lgm_clk_ddiv_recalc_rate()
/drivers/media/dvb-frontends/
A Dstb0899_algo.c1274 int div1, div2, rem1, rem2; in stb0899_dvbs2_get_srate() local
1276 div1 = config->btr_nco_bits / 2; in stb0899_dvbs2_get_srate()
1277 div2 = config->btr_nco_bits - div1 - 1; in stb0899_dvbs2_get_srate()
1285 intval1 = internal->master_clk / (1 << div1); in stb0899_dvbs2_get_srate()
1288 rem1 = internal->master_clk % (1 << div1); in stb0899_dvbs2_get_srate()
1291 srate = (intval1 * intval2) + ((intval1 * rem2) / (1 << div2)) + ((intval2 * rem1) / (1 << div1)); in stb0899_dvbs2_get_srate()
/drivers/comedi/drivers/
A Dadl_pci9118.c532 unsigned int *div1, unsigned int *div2, in pci9118_calc_divisors() argument
538 *div1 = *tim2 / pacer->osc_base; /* convert timer (burst) */ in pci9118_calc_divisors()
540 *div2 = *div2 / *div1; /* major timer is c1*c2 */ in pci9118_calc_divisors()
544 *tim2 = *div1 * pacer->osc_base; /* real convert timer */ in pci9118_calc_divisors()
552 *tim1 = *div1 * *div2 * pacer->osc_base; in pci9118_calc_divisors()
/drivers/gpu/drm/i915/display/
A Dintel_dpll_mgr.c2931 int div1 = div1_vals[i]; in icl_mg_pll_find_divisors() local
2934 int dco = div1 * div2 * clock_khz * 5; in icl_mg_pll_find_divisors()
2955 switch (div1) { in icl_mg_pll_find_divisors()
2957 MISSING_CASE(div1); in icl_mg_pll_find_divisors()
3206 u32 m1, m2_int, m2_frac, div1, div2, ref_clock; in icl_ddi_mg_pll_get_freq() local
3239 div1 = 2; in icl_ddi_mg_pll_get_freq()
3242 div1 = 3; in icl_ddi_mg_pll_get_freq()
3245 div1 = 5; in icl_ddi_mg_pll_get_freq()
3248 div1 = 7; in icl_ddi_mg_pll_get_freq()
3269 tmp = div_u64(tmp, 5 * div1 * div2); in icl_ddi_mg_pll_get_freq()
/drivers/iio/adc/
A Dat91-sama5d2_adc.c1865 u64 div1, div2; in at91_adc_read_temp() local
1902 div1 = DIV_ROUND_CLOSEST_ULL(((u64)vtemp * clb->p6), vbg); in at91_adc_read_temp()
1903 div1 = DIV_ROUND_CLOSEST_ULL((div1 * 1000), AT91_ADC_TS_VTEMP_DT); in at91_adc_read_temp()
1906 *val = clb->p1 + (int)div1 - (int)div2; in at91_adc_read_temp()
/drivers/gpu/drm/nouveau/nvkm/engine/disp/
A Dgf119.c290 u32 div1 = sor->asy.link == 3; in gf119_sor_clock() local
300 nvkm_mask(device, 0x612300 + soff, 0x00000707, (div2 << 8) | div1); in gf119_sor_clock()

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