| /drivers/clk/samsung/ |
| A D | clk-exynos5260.c | 146 .div_clks = aud_div_clks,
336 .div_clks = disp_div_clks,
402 .div_clks = egl_div_clks,
591 .div_clks = g2d_div_clks,
654 .div_clks = g3d_div_clks,
787 .div_clks = gscl_div_clks,
906 .div_clks = isp_div_clks,
972 .div_clks = kfc_div_clks,
1026 .div_clks = mfc_div_clks,
1175 .div_clks = mif_div_clks,
[all …]
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| A D | clk-exynosautov920.c | 994 .div_clks = top_div_clks,
1124 .div_clks = cpucl0_div_clks,
1226 .div_clks = cpucl1_div_clks,
1328 .div_clks = cpucl2_div_clks,
1477 .div_clks = peric0_div_clks,
1617 .div_clks = peric1_div_clks,
1669 .div_clks = misc_div_clks,
1707 .div_clks = hsi0_div_clks,
1816 .div_clks = hsi2_div_clks,
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| A D | clk-exynos850.c | 568 .div_clks = top_div_clks,
706 .div_clks = apm_div_clks,
989 .div_clks = aud_div_clks,
1092 .div_clks = cmgp_div_clks,
1294 .div_clks = cpucl0_div_clks,
1449 .div_clks = cpucl1_div_clks,
1557 .div_clks = g3d_div_clks,
1791 .div_clks = is_div_clks,
2081 .div_clks = peri_div_clks,
2196 .div_clks = core_div_clks,
[all …]
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| A D | clk-exynos3250.c | 329 static const struct samsung_div_clock div_clks[] __initconst = { variable
805 .div_clks = div_clks,
806 .nr_div_clks = ARRAY_SIZE(div_clks),
927 .div_clks = dmc_div_clks,
1069 .div_clks = isp_div_clks,
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| A D | clk-exynos7.c | 190 .div_clks = topc_div_clks,
382 .div_clks = top0_div_clks,
564 .div_clks = top1_div_clks,
1098 .div_clks = fsys1_div_clks,
1211 .div_clks = mscl_div_clks,
1300 .div_clks = aud_div_clks,
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| A D | clk-exynosautov9.c | 950 .div_clks = top_div_clks,
1012 .div_clks = busmc_div_clks,
1070 .div_clks = core_div_clks,
1149 .div_clks = dpum_div_clks,
1516 .div_clks = fsys1_div_clks,
1838 .div_clks = peric0_div_clks,
2093 .div_clks = peric1_div_clks,
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| A D | clk-exynos5-subcmu.h | 14 const struct samsung_div_clock *div_clks; member
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| A D | clk-fsd.c | 308 .div_clks = cmu_div_clks,
671 .div_clks = peric_div_clks,
970 .div_clks = fsys0_div_clks,
1142 .div_clks = fsys1_div_clks,
1421 .div_clks = imem_div_clks,
1546 .div_clks = mfc_div_clks,
1750 .div_clks = cam_csi_div_clks,
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| A D | clk-exynos5433.c | 814 .div_clks = top_div_clks,
897 .div_clks = cpif_div_clks,
1549 .div_clks = mif_div_clks,
2479 .div_clks = g2d_div_clks,
2903 .div_clks = disp_div_clks,
3075 .div_clks = aud_div_clks,
3360 .div_clks = g3d_div_clks,
3954 .div_clks = atlas_div_clks,
4130 .div_clks = mscl_div_clks,
4238 .div_clks = mfc_div_clks,
[all …]
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| A D | clk-s5pv210.c | 476 static const struct samsung_div_clock div_clks[] __initconst = { variable
776 samsung_clk_register_div(ctx, div_clks, ARRAY_SIZE(div_clks)); in __s5pv210_clk_init()
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| A D | clk.c | 341 if (cmu->div_clks) in samsung_cmu_register_clocks()
342 samsung_clk_register_div(ctx, cmu->div_clks, cmu->nr_div_clks); in samsung_cmu_register_clocks()
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| A D | clk-exynos7870.c | 729 .div_clks = mif_div_clks,
1007 .div_clks = dispaud_div_clks,
1244 .div_clks = g3d_div_clks,
1431 .div_clks = isp_div_clks,
1520 .div_clks = mfcmscl_div_clks,
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| A D | clk-exynos2200.c | 1922 .div_clks = top_div_clks,
2336 .div_clks = alive_div_clks,
2729 .div_clks = cmgp_div_clks,
2878 .div_clks = hsi0_div_clks,
2986 .div_clks = peric0_div_clks,
3202 .div_clks = peric1_div_clks,
3547 .div_clks = peric2_div_clks,
3869 .div_clks = vts_div_clks,
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| A D | clk-exynos5-subcmu.c | 110 samsung_clk_register_div(ctx, info->div_clks, info->nr_div_clks); in exynos5_subcmu_probe()
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| A D | clk-exynos5420.c | 1331 .div_clks = exynos5x_disp_div_clks,
1341 .div_clks = exynos5x_gsc_div_clks,
1359 .div_clks = exynos5x_mfc_div_clks,
1369 .div_clks = exynos5x_mscl_div_clks,
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| A D | clk-exynos7885.c | 348 .div_clks = top_div_clks,
676 .div_clks = core_div_clks,
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| A D | clk-gs101.c | 1427 .div_clks = cmu_top_div_clks,
1906 .div_clks = apm_div_clks,
2369 .div_clks = hsi0_div_clks,
3419 .div_clks = misc_div_clks,
4016 .div_clks = peric0_div_clks,
4364 .div_clks = peric1_div_clks,
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| A D | clk-exynos5410.c | 260 .div_clks = exynos5410_div_clks,
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| A D | clk.h | 348 const struct samsung_div_clock *div_clks; member
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| A D | clk-exynos4.c | 1275 .div_clks = exynos4_div_clks,
1288 .div_clks = exynos4210_div_clks,
1303 .div_clks = exynos4x12_div_clks,
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| A D | clk-exynos990.c | 1127 .div_clks = top_div_clks,
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| A D | clk-exynos8895.c | 1293 .div_clks = top_div_clks,
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| /drivers/clk/tegra/ |
| A D | clk-tegra-periph.c | 823 static struct tegra_periph_init_data div_clks[] = { variable
919 for (i = 0; i < ARRAY_SIZE(div_clks); i++) { in div_clk_init()
922 data = div_clks + i; in div_clk_init()
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| /drivers/clk/sophgo/ |
| A D | clk-sg2042-clkgen.c | 813 struct sg2042_divider_clock div_clks[], in sg2042_clk_register_divs() argument
821 div = &div_clks[i]; in sg2042_clk_register_divs()
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