Searched refs:divsel (Results 1 – 2 of 2) sorted by relevance
| /drivers/gpu/drm/i915/display/ |
| A D | intel_pch_refclk.c | 128 u32 divsel, phaseinc, auxdiv, phasedir, desired_divisor; member
158 p->divsel = (p->desired_divisor / p->iclk_pi_range) - 2; in lpt_compute_iclkip()
165 if (p->divsel <= 0x7f) in lpt_compute_iclkip()
193 drm_WARN_ON(display->drm, SBI_SSCDIVINTPHASE_DIVSEL(p.divsel) & in lpt_program_iclkip()
200 clock, p.auxdiv, p.divsel, p.phasedir, p.phaseinc); in lpt_program_iclkip()
207 temp |= SBI_SSCDIVINTPHASE_DIVSEL(p.divsel); in lpt_program_iclkip()
252 p.divsel = (temp & SBI_SSCDIVINTPHASE_DIVSEL_MASK) >> in lpt_get_iclkip()
263 p.desired_divisor = (p.divsel + 2) * p.iclk_pi_range + p.phaseinc; in lpt_get_iclkip()
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| /drivers/mfd/ |
| A D | db8500-prcmu.c | 504 u32 divsel; member
511 .divsel = PRCM_DSI_PLLOUT_SEL_PHI,
516 .divsel = PRCM_DSI_PLLOUT_SEL_PHI,
1503 u32 divsel; in dsiclk_rate() local
1506 divsel = readl(PRCM_DSI_PLLOUT_SEL); in dsiclk_rate()
1507 divsel = ((divsel & dsiclk[n].divsel_mask) >> dsiclk[n].divsel_shift); in dsiclk_rate()
1509 if (divsel == PRCM_DSI_PLLOUT_SEL_OFF) in dsiclk_rate()
1510 divsel = dsiclk[n].divsel; in dsiclk_rate()
1512 dsiclk[n].divsel = divsel; in dsiclk_rate()
1514 switch (divsel) { in dsiclk_rate()
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