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Searched refs:dm_sw_64kb_r_x (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dml/
A Ddisplay_mode_enums.h87 dm_sw_64kb_r_x = 27, enumerator
/drivers/gpu/drm/amd/display/dc/dml/dcn30/
A Ddisplay_mode_vba_30.c1487 if (BytePerPixelY == 2 || (BytePerPixelY == 4 && TilingFormat != dm_sw_64kb_r_x)) { in CalculateDCCConfiguration()
1495 || TilingFormat == dm_sw_64kb_r_x)) in CalculateDCCConfiguration()
1496 || (BytePerPixelY == 4 && TilingFormat == dm_sw_64kb_r_x)) { in CalculateDCCConfiguration()
1501 if (BytePerPixelC == 2 || (BytePerPixelC == 4 && TilingFormat != dm_sw_64kb_r_x)) { in CalculateDCCConfiguration()
1509 || TilingFormat == dm_sw_64kb_r_x)) in CalculateDCCConfiguration()
1510 || (BytePerPixelC == 4 && TilingFormat == dm_sw_64kb_r_x)) { in CalculateDCCConfiguration()
/drivers/gpu/drm/amd/display/dc/dml/dcn31/
A Ddisplay_mode_vba_31.c1622 if (BytePerPixelY == 2 || (BytePerPixelY == 4 && TilingFormat != dm_sw_64kb_r_x)) {
1627 …ilingFormat == dm_sw_64kb_d_x || TilingFormat == dm_sw_64kb_d_t || TilingFormat == dm_sw_64kb_r_x))
1628 || (BytePerPixelY == 4 && TilingFormat == dm_sw_64kb_r_x)) {
1633 if (BytePerPixelC == 2 || (BytePerPixelC == 4 && TilingFormat != dm_sw_64kb_r_x)) {
1638 …ilingFormat == dm_sw_64kb_d_x || TilingFormat == dm_sw_64kb_d_t || TilingFormat == dm_sw_64kb_r_x))
1639 || (BytePerPixelC == 4 && TilingFormat == dm_sw_64kb_r_x)) {
/drivers/gpu/drm/amd/display/dc/dml/dcn314/
A Ddisplay_mode_vba_314.c1639 if (BytePerPixelY == 2 || (BytePerPixelY == 4 && TilingFormat != dm_sw_64kb_r_x)) {
1644 …ilingFormat == dm_sw_64kb_d_x || TilingFormat == dm_sw_64kb_d_t || TilingFormat == dm_sw_64kb_r_x))
1645 || (BytePerPixelY == 4 && TilingFormat == dm_sw_64kb_r_x)) {
1650 if (BytePerPixelC == 2 || (BytePerPixelC == 4 && TilingFormat != dm_sw_64kb_r_x)) {
1655 …ilingFormat == dm_sw_64kb_d_x || TilingFormat == dm_sw_64kb_d_t || TilingFormat == dm_sw_64kb_r_x))
1656 || (BytePerPixelC == 4 && TilingFormat == dm_sw_64kb_r_x)) {
/drivers/gpu/drm/amd/display/dc/dml/dcn21/
A Ddisplay_mode_vba_21.c1125 == dm_sw_64kb_r_x))) { in CalculateDCCConfiguration()
1160 || TilingFormat == dm_sw_64kb_r_x) { in CalculateDCCConfiguration()
1354 || SurfaceTiling == dm_sw_64kb_r_x) { in CalculateVMAndRowBytes()
3575 || (mode_lib->vba.SurfaceTiling[k] == dm_sw_64kb_r_x in dml21_ModeSupportAndSystemConfigurationFull()
/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddcn20_fpu.c1292 *sw_mode = dm_sw_64kb_r_x; in swizzle_to_dml_params()
A Ddisplay_mode_vba_20.c948 || SurfaceTiling == dm_sw_64kb_r_x) { in CalculateVMAndRowBytes()
3341 || (mode_lib->vba.SurfaceTiling[k] == dm_sw_64kb_r_x in dml20_ModeSupportAndSystemConfigurationFull()
A Ddisplay_mode_vba_20v2.c1008 || SurfaceTiling == dm_sw_64kb_r_x) { in CalculateVMAndRowBytes()
3448 || (mode_lib->vba.SurfaceTiling[k] == dm_sw_64kb_r_x in dml20v2_ModeSupportAndSystemConfigurationFull()
/drivers/gpu/drm/amd/display/dc/dml/dcn32/
A Ddisplay_mode_vba_util_32.c369 SurfaceTiling == dm_sw_64kb_d_x || SurfaceTiling == dm_sw_64kb_r_x) { in dml32_CalculateBytePerPixelAndBlockSizes()

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