Searched refs:dmar_readq (Results 1 – 7 of 7) sorted by relevance
| /drivers/iommu/intel/ |
| A D | prq.c | 84 tail = dmar_readq(iommu->reg + DMAR_PQT_REG) & PRQ_RING_MASK; in intel_iommu_drain_pasid_prq()
85 head = dmar_readq(iommu->reg + DMAR_PQH_REG) & PRQ_RING_MASK; in intel_iommu_drain_pasid_prq()
212 tail = dmar_readq(iommu->reg + DMAR_PQT_REG) & PRQ_RING_MASK; in prq_event_thread()
213 head = dmar_readq(iommu->reg + DMAR_PQH_REG) & PRQ_RING_MASK; in prq_event_thread()
272 head = dmar_readq(iommu->reg + DMAR_PQH_REG) & PRQ_RING_MASK; in prq_event_thread()
273 tail = dmar_readq(iommu->reg + DMAR_PQT_REG) & PRQ_RING_MASK; in prq_event_thread()
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| A D | debugfs.c | 144 value = dmar_readq(iommu->reg + iommu_regs_64[i].offset); in iommu_regset_show()
252 if (dmar_readq(iommu->reg + DMAR_RTADDR_REG) & DMA_RTADDR_SMT) { in ctx_tbl_walk()
375 if (dmar_readq(iommu->reg + DMAR_RTADDR_REG) & DMA_RTADDR_SMT) in domain_translation_struct_show()
530 dmar_readq(iommu->reg + DMAR_IQH_REG) >> shift, in invalidation_queue_show()
531 dmar_readq(iommu->reg + DMAR_IQT_REG) >> shift); in invalidation_queue_show()
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| A D | perfmon.c | 310 new_count = dmar_readq(iommu_event_base(iommu_pmu, hwc->idx)); in iommu_pmu_event_update()
343 count = dmar_readq(iommu_event_base(iommu_pmu, hwc->idx)); in iommu_pmu_start()
499 while ((status = dmar_readq(iommu_pmu->overflow))) { in iommu_pmu_counter_overflow()
577 perfcap = dmar_readq(iommu->reg + DMAR_PERFCAP_REG); in alloc_iommu_pmu()
620 pcap = dmar_readq(iommu->reg + DMAR_PERFEVNTCAP_REG + in alloc_iommu_pmu()
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| A D | dmar.c | 902 cap = dmar_readq(addr + DMAR_CAP_REG); in dmar_validate_one_drhd()
903 ecap = dmar_readq(addr + DMAR_ECAP_REG); in dmar_validate_one_drhd()
985 iommu->cap = dmar_readq(iommu->reg + DMAR_CAP_REG); in map_iommu()
986 iommu->ecap = dmar_readq(iommu->reg + DMAR_ECAP_REG); in map_iommu()
1020 iommu->ecmdcap[i] = dmar_readq(iommu->reg + DMAR_ECCAP_REG + in map_iommu()
1243 u64 iqe_err = dmar_readq(iommu->reg + DMAR_IQER_REG); in qi_dump_fault()
1325 iqe_err = dmar_readq(iommu->reg + DMAR_IQER_REG); in qi_check_fault()
1984 guest_addr = dmar_readq(iommu->reg + reg + in dmar_fault()
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| A D | iommu.c | 1085 dmar_readq, (!(val & DMA_CCMD_ICC)), val); in __iommu_flush_context()
1127 dmar_readq, (!(val & DMA_TLB_IVT)), val); in __iommu_flush_iotlb()
2012 rtaddr_reg = dmar_readq(iommu->reg + DMAR_RTADDR_REG); in copy_translation_tables()
4765 res = dmar_readq(iommu->reg + DMAR_ECRSP_REG); in ecmd_submit_sync()
4781 IOMMU_WAIT_OP(iommu, DMAR_ECRSP_REG, dmar_readq, in ecmd_submit_sync()
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| A D | iommu.h | 152 #define dmar_readq(a) readq(a) macro
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| A D | irq_remapping.c | 425 irta = dmar_readq(iommu->reg + DMAR_IRTA_REG); in iommu_load_old_irte()
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