Searched refs:dmask (Results 1 – 8 of 8) sorted by relevance
| /drivers/gpu/drm/i915/gt/ |
| A D | intel_gt_irq.c | 268 u32 dmask; in gen11_gt_irq_postinstall() local
276 dmask = irqs << 16 | irqs; in gen11_gt_irq_postinstall()
294 intel_uncore_write(uncore, GEN11_VCS_VECS_INTR_ENABLE, dmask); in gen11_gt_irq_postinstall()
304 intel_uncore_write(uncore, XEHPC_BCS1_BCS2_INTR_MASK, ~dmask); in gen11_gt_irq_postinstall()
306 intel_uncore_write(uncore, XEHPC_BCS3_BCS4_INTR_MASK, ~dmask); in gen11_gt_irq_postinstall()
308 intel_uncore_write(uncore, XEHPC_BCS5_BCS6_INTR_MASK, ~dmask); in gen11_gt_irq_postinstall()
310 intel_uncore_write(uncore, XEHPC_BCS7_BCS8_INTR_MASK, ~dmask); in gen11_gt_irq_postinstall()
311 intel_uncore_write(uncore, GEN11_VCS0_VCS1_INTR_MASK, ~dmask); in gen11_gt_irq_postinstall()
312 intel_uncore_write(uncore, GEN11_VCS2_VCS3_INTR_MASK, ~dmask); in gen11_gt_irq_postinstall()
314 intel_uncore_write(uncore, GEN12_VCS4_VCS5_INTR_MASK, ~dmask); in gen11_gt_irq_postinstall()
[all …]
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| /drivers/gpu/drm/xe/ |
| A D | xe_irq.c | 142 u32 irqs, dmask, smask; in xe_irq_enable_hwe() local
162 dmask = irqs << 16 | irqs; in xe_irq_enable_hwe()
167 xe_mmio_write32(mmio, RENDER_COPY_INTR_ENABLE, dmask); in xe_irq_enable_hwe()
175 xe_mmio_write32(mmio, XEHPC_BCS1_BCS2_INTR_MASK, ~dmask); in xe_irq_enable_hwe()
177 xe_mmio_write32(mmio, XEHPC_BCS3_BCS4_INTR_MASK, ~dmask); in xe_irq_enable_hwe()
183 xe_mmio_write32(mmio, CCS0_CCS1_INTR_MASK, ~dmask); in xe_irq_enable_hwe()
185 xe_mmio_write32(mmio, CCS2_CCS3_INTR_MASK, ~dmask); in xe_irq_enable_hwe()
190 xe_mmio_write32(mmio, VCS_VECS_INTR_ENABLE, dmask); in xe_irq_enable_hwe()
193 xe_mmio_write32(mmio, VCS0_VCS1_INTR_MASK, ~dmask); in xe_irq_enable_hwe()
194 xe_mmio_write32(mmio, VCS2_VCS3_INTR_MASK, ~dmask); in xe_irq_enable_hwe()
[all …]
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| /drivers/net/ethernet/mellanox/mlx5/core/en_accel/ |
| A D | ipsec.c | 388 memset(addrs->dmask.m6, 0xFF, sizeof(__be32) * 4); in mlx5e_ipsec_state_mask()
1136 addrs->dmask.m4 = word_to_mask(sel->prefixlen_d); in mlx5e_ipsec_policy_mask()
1137 addrs->daddr.a4 &= addrs->dmask.m4; in mlx5e_ipsec_policy_mask()
1148 addrs->dmask.m6[i] = in mlx5e_ipsec_policy_mask()
1150 addrs->daddr.a6[i] &= addrs->dmask.m6[i]; in mlx5e_ipsec_policy_mask()
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| A D | ipsec.h | 95 } dmask; member
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| A D | ipsec_fs.c | 1493 __be32 *dmask = &addrs->dmask.m4; in setup_fte_addr4() local
1514 outer_headers.dst_ipv4_dst_ipv6.ipv4_layout.ipv4), dmask, 4); in setup_fte_addr4()
1524 __be32 *dmask = addrs->dmask.m6; in setup_fte_addr6() local
1538 outer_headers.src_ipv4_src_ipv6.ipv6_layout.ipv6), dmask, 16); in setup_fte_addr6()
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| /drivers/gpu/drm/nouveau/nvkm/subdev/bios/ |
| A D | init.c | 522 u8 dmask = nvbios_rd08(bios, table + (cond * 9) + 7); in init_io_flag_condition_met() local
525 return (nvbios_rd08(bios, data + ioval) & dmask) == value; in init_io_flag_condition_met()
1423 u32 dmask = nvbios_rd32(bios, init->offset + 18); in init_copy_nv_reg() local
1428 dreg, dmask, sreg, (shift & 0x80) ? "<<" : ">>", in init_copy_nv_reg()
1433 init_mask(init, dreg, ~dmask, (data & smask) ^ sxor); in init_copy_nv_reg()
2065 u32 dmask = nvbios_rd32(bios, init->offset + 12); in init_xlat() local
2071 daddr, dmask, index, saddr, (sshift & 0x80) ? "<<" : ">>", in init_xlat()
2077 init_mask(init, daddr, ~dmask, data); in init_xlat()
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| /drivers/isdn/hardware/mISDN/ |
| A D | hfcmulti.c | 205 static uint dmask[MAX_CARDS]; variable
235 module_param_array(dmask, uint, NULL, S_IRUGO | S_IWUSR);
5006 if (hc->ctype == HFC_TYPE_E1 && dmask[E1_cnt]) { in hfcmulti_init()
5011 if (!((1 << ch) & dmask[E1_cnt])) in hfcmulti_init()
5016 || (dmask[E1_cnt] & hc->bmask[pt])) { in hfcmulti_init()
5031 if (hc->ctype == HFC_TYPE_E1 && !dmask[E1_cnt]) { in hfcmulti_init()
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| /drivers/tty/ |
| A D | synclink_gt.c | 2876 gpio.dir, gpio.dmask)); in set_gpio()
2879 if (gpio.dmask) { in set_gpio()
2881 data |= gpio.dmask & gpio.dir; in set_gpio()
2882 data &= ~(gpio.dmask & ~gpio.dir); in set_gpio()
2907 gpio.dmask = 0xffffffff; in get_gpio()
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Completed in 42 milliseconds