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Searched refs:dml2_soc_state_table (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/
A Ddml_top_soc_parameter_types.h118 struct dml2_soc_state_table { struct
140 struct dml2_soc_state_table clk_table; argument
/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
A Ddml2_core_utils.h29 …tive_min_uclk_dpm_index(unsigned long uclk_freq_khz, const struct dml2_soc_state_table *clk_table);
A Ddml2_core_utils.c533 …ctive_min_uclk_dpm_index(unsigned long uclk_freq_khz, const struct dml2_soc_state_table *clk_table) in dml2_core_utils_get_active_min_uclk_dpm_index()
A Ddml2_core_dcn4_calcs.c7101 …ctive_min_uclk_dpm_index(unsigned long uclk_freq_khz, const struct dml2_soc_state_table *clk_table) in get_active_min_uclk_dpm_index()
/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/
A Ddml2_dpmm_dcn4.c283 …ed(struct dml2_display_cfg_programming *display_cfg, const struct dml2_soc_state_table *state_tabl… in map_soc_min_clocks_to_dpm_fine_grained()
321 …ed(struct dml2_display_cfg_programming *display_cfg, const struct dml2_soc_state_table *state_tabl… in map_soc_min_clocks_to_dpm_coarse_grained()
362 …t, struct dml2_display_cfg_programming *display_cfg, const struct dml2_soc_state_table *state_tabl… in map_min_clocks_to_dpm()
/drivers/gpu/drm/amd/display/dc/dml2/dml21/
A Ddml21_translation_helper.c92 struct dml2_soc_state_table *dml_clk_table = &dml_init->soc_bb.clk_table; in override_dml_init_with_values_from_smu()
268 struct dml2_soc_state_table *dml_clk_table = &dml_init->soc_bb.clk_table; in override_dml_init_with_values_from_vbios()

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