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Searched refs:dml_max (Results 1 – 18 of 18) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dml/
A Ddml_inline_defs.h47 static inline double dml_max(double a, double b) in dml_max() function
54 return dml_max(dml_max(a, b), c); in dml_max3()
59 return dml_max(dml_max(a, b), dml_max(c, d)); in dml_max4()
64 return dml_max(dml_max4(a, b, c, d), e); in dml_max5()
A Ddml1_display_rq_dlg_calc.c1306 line_wait = dml_max( in dml1_rq_dlg_get_dlg_params()
1365 max_vinit_l = interlaced ? dml_max(vinit_l, vinit_bot_l) : vinit_l; in dml1_rq_dlg_get_dlg_params()
1366 max_vinit_c = interlaced ? dml_max(vinit_c, vinit_bot_c) : vinit_c; in dml1_rq_dlg_get_dlg_params()
1410 t_vm_us = dml_max( in dml1_rq_dlg_get_dlg_params()
1412 dml_max((double) vm_bytes / prefetch_bw, t_vm_us)); in dml1_rq_dlg_get_dlg_params()
1415 t_vm_us = dml_max(mode_lib->soc.urgent_latency_us, t_vm_us); in dml1_rq_dlg_get_dlg_params()
1417 t_vm_us = dml_max(vm_bytes / flip_bw, t_vm_us); in dml1_rq_dlg_get_dlg_params()
1424 t_r0_us = dml_max( in dml1_rq_dlg_get_dlg_params()
1427 t_r0_us = dml_max((double) (line_time_in_us - t_vm_us), t_r0_us); in dml1_rq_dlg_get_dlg_params()
1430 t_r0_us = dml_max(mode_lib->soc.urgent_latency_us * 2.0, t_r0_us); in dml1_rq_dlg_get_dlg_params()
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A Ddisplay_mode_vba.c1130 double CalculateWriteBackDISPCLK = 1.01 * PixelClock * dml_max( in CalculateWriteBackDISPCLK()
1132 …dml_max((WritebackLumaVTaps * dml_ceil(1.0 / WritebackVRatio, 1) * dml_ceil(WritebackDestinationWi… in CalculateWriteBackDISPCLK()
1137 CalculateWriteBackDISPCLK = dml_max(CalculateWriteBackDISPCLK, 1.01 * PixelClock * dml_max( in CalculateWriteBackDISPCLK()
1139 …dml_max((WritebackChromaVTaps * dml_ceil(1 / (2 * WritebackVRatio), 1) * dml_ceil(WritebackDestina… in CalculateWriteBackDISPCLK()
/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddisplay_mode_vba_20.c607 dml_max( in CalculatePrefetchSchedule()
663 dml_max( in CalculatePrefetchSchedule()
682 dml_max( in CalculatePrefetchSchedule()
1097 dml_max( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1205 dml_max( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1215 dml_max( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1223 dml_max( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1233 dml_max( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1463 dml_max( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2986 dml_max( in CalculateWriteBackDelay()
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A Ddisplay_mode_vba_20v2.c667 dml_max( in CalculatePrefetchSchedule()
669 dml_max( in CalculatePrefetchSchedule()
723 dml_max( in CalculatePrefetchSchedule()
742 dml_max( in CalculatePrefetchSchedule()
1157 dml_max( in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1265 dml_max( in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1275 dml_max( in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1283 dml_max( in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1293 dml_max( in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3059 dml_max( in CalculateWriteBackDelay()
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A Ddisplay_rq_dlg_calc_20.c1081 line_wait = dml_max(mode_lib->soc.sr_enter_plus_exit_time_us, line_wait); in dml20_rq_dlg_get_dlg_params()
1083 line_wait = dml_max(mode_lib->soc.dram_clock_change_latency_us in dml20_rq_dlg_get_dlg_params()
A Ddisplay_rq_dlg_calc_20v2.c1082 line_wait = dml_max(mode_lib->soc.sr_enter_plus_exit_time_us, line_wait); in dml20v2_rq_dlg_get_dlg_params()
1084 line_wait = dml_max(mode_lib->soc.dram_clock_change_latency_us in dml20v2_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/display/dc/dml/dcn21/
A Ddisplay_mode_vba_21.c925 dml_max( in CalculatePrefetchSchedule()
1481 dml_max( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1589 dml_max( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1599 dml_max( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1607 dml_max( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1617 dml_max( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2567 dml_max( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3073 dml_max( in CalculateWriteBackDelay()
3088 dml_max( in CalculateWriteBackDelay()
3845 dml_max( in dml21_ModeSupportAndSystemConfigurationFull()
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A Ddisplay_rq_dlg_calc_21.c1128 line_wait = dml_max(mode_lib->soc.sr_enter_plus_exit_time_us, line_wait); in dml_rq_dlg_get_dlg_params()
1130 line_wait = dml_max( in dml_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/display/dc/dml/dcn30/
A Ddisplay_mode_vba_30.c1934 v->DPPCLKUsingSingleDPP[k] = dml_max( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1964 v->DISPCLKWithRamping = dml_max( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1967 v->DISPCLKWithoutRamping = dml_max( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1999 v->GlobalDPPCLK = dml_max( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2632 - dml_max( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2926 v->MinTTUVBlank[k] = dml_max( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2928 dml_max( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2934 v->MinTTUVBlank[k] = dml_max( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
4587 v->WritebackDelayTime[k] = dml_max( in dml30_ModeSupportAndSystemConfigurationFull()
4923 - dml_max( in dml30_ModeSupportAndSystemConfigurationFull()
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A Ddisplay_rq_dlg_calc_30.c1235 line_wait = dml_max(mode_lib->soc.sr_enter_plus_exit_time_us, line_wait); in dml_rq_dlg_get_dlg_params()
1237 line_wait = dml_max(mode_lib->soc.dram_clock_change_latency_us in dml_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/display/dc/dml/dcn31/
A Ddisplay_mode_vba_31.c1063 min_Lsw = dml_max(1, dml_max(PrefetchSourceLinesY, PrefetchSourceLinesC) / max_vratio_pre);
1315 *VRatioPrefetchY = dml_max(
1341 *VRatioPrefetchC = dml_max(
2024 v->WritebackDISPCLK = dml_max(
2050 * dml_max(
2545 - dml_max(
2827 - dml_max(
3086 v->MinTTUVBlank[k] = dml_max(
3532 v->final_flip_bw[k] = dml_max(
5005 - dml_max(
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/drivers/gpu/drm/amd/display/dc/dml/dcn314/
A Ddisplay_mode_vba_314.c1081 min_Lsw = dml_max(1, dml_max(PrefetchSourceLinesY, PrefetchSourceLinesC) / max_vratio_pre);
1333 *VRatioPrefetchY = dml_max(
1359 *VRatioPrefetchC = dml_max(
2042 v->WritebackDISPCLK = dml_max(
2068 * dml_max(
2106 v->DISPCLKWithRamping = dml_max(
2114 v->DISPCLKWithRamping = dml_max(
2846 - dml_max(
3105 v->MinTTUVBlank[k] = dml_max(
3638 v->final_flip_bw[k] = dml_max(
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/drivers/gpu/drm/amd/display/dc/dml/dcn32/
A Ddisplay_mode_vba_util_32.c1566 *GlobalDPPCLK = dml_max(*GlobalDPPCLK, Dppclk[k]); in dml32_CalculateDPPCLK()
3071 dml_max(1.0, ExpectedVRatioPrefetch) * in dml32_UseMinimumDCFCLK()
3072 dml_max(1.0, ExpectedVRatioPrefetch / 4); in dml32_UseMinimumDCFCLK()
3220 *VReadyOffsetPix = dml_ceil(dml_max(150.0 / Dppclk, in dml32_CalculateVUpdateAndDynamicMetadataParameters()
3646 min_Lsw = dml_max(min_Lsw, 1.0); in dml32_CalculatePrefetchSchedule()
3948 *VRatioPrefetchY = dml_max(*VRatioPrefetchY, 1.0); in dml32_CalculatePrefetchSchedule()
3957 dml_max((double) PrefetchSourceLinesY / in dml32_CalculatePrefetchSchedule()
3975 *VRatioPrefetchC = dml_max(*VRatioPrefetchC, 1.0); in dml32_CalculatePrefetchSchedule()
3985 dml_max(*VRatioPrefetchC, in dml32_CalculatePrefetchSchedule()
5946 StutterBurstTime = dml_max(StutterBurstTime, in dml32_CalculateStutterEfficiency()
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A Ddisplay_mode_vba_32.c87 v->WritebackDISPCLK = dml_max(v->WritebackDISPCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
105 v->DISPCLK_calculated = dml_max(v->DISPCLK_calculated, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
618 dml_max(v->WritebackDelay[mode_lib->vba.VoltageLevel][k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1237 v->WritebackAllowDRAMClockChangeEndPosition[k] = dml_max(0, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1240 v->WritebackAllowFCLKChangeEndPosition[k] = dml_max(0, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1445 + dml_max(1.0, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1947 + dml_max(dml_ceil(mode_lib->vba.VRatioChroma[k], 1.0) - 2, in dml32_ModeSupportAndSystemConfigurationFull()
2230 mode_lib->vba.WritebackRequiredDISPCLK = dml_max( in dml32_ModeSupportAndSystemConfigurationFull()
2936 dml_max(mode_lib->vba.WritebackDelayTime[k], in dml32_ModeSupportAndSystemConfigurationFull()
2967 - dml_max(1.0, dml_ceil(1.0 * in dml32_ModeSupportAndSystemConfigurationFull()
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/drivers/gpu/drm/amd/display/dc/dml2/
A Ddisplay_mode_util.c146 dml_float_t dml_max(dml_float_t x, dml_float_t y) in dml_max() function
159 return dml_max(dml_max(x, y), z); in dml_max3()
163 return dml_max(dml_max(a, b), dml_max(c, d)); in dml_max4()
167 return dml_max(dml_max4(a, b, c, d), e); in dml_max5()
A Ddisplay_mode_core.c1195 s->min_Lsw_oto = dml_max(s->min_Lsw_oto, 1.0); in CalculatePrefetchSchedule()
1446 *p->VRatioPrefetchY = dml_max(*p->VRatioPrefetchY, 1.0); in CalculatePrefetchSchedule()
1454 *p->VRatioPrefetchY = dml_max(*p->VRatioPrefetchY, in CalculatePrefetchSchedule()
1469 *p->VRatioPrefetchC = dml_max(*p->VRatioPrefetchC, 1.0); in CalculatePrefetchSchedule()
1759 TWait = dml_max(SREnterPlusExitTime, UrgentLatency); in CalculateTWait()
4587 return dml_max(PixelClock / 4.0 * OutputBpp / 24.0, 25.0); in RequiredDTBCLK()
5704 *GlobalDPPCLK = dml_max(*GlobalDPPCLK, Dppclk[k]); in CalculateDPPCLK()
6193 dml_uint_t vblank_nom_vsync_capped = dml_max(vblank_nom_input, in CalculateMaxVStartup()
8343 dml_max( in dml_core_mode_programming()
8845 dml_max( in dml_core_mode_programming()
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A Ddisplay_mode_util.h43 __DML_DLL_EXPORT__ dml_float_t dml_max(dml_float_t x, dml_float_t y);

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