| /drivers/gpu/drm/amd/display/dc/dml/ |
| A D | dml_inline_defs.h | 32 static inline double dml_min(double a, double b) in dml_min() function 39 return dml_min(dml_min(a, b), c); in dml_min3() 44 return dml_min(dml_min(a, b), dml_min(c, d)); in dml_min4()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| A D | display_mode_vba_util_32.c | 1107 NextDETBufferPieceInKByte = dml_min( in dml32_CalculateDETBufferSize() 1641 MaxLinkBPP = dml_min(MaxLinkBPP, 16); in dml32_TruncToValidBPP() 1643 MaxLinkBPP = dml_min(MaxLinkBPP, 32); in dml32_TruncToValidBPP() 1648 MaxLinkBPP = dml_min(MaxLinkBPP, 16); in dml32_TruncToValidBPP() 1650 MaxLinkBPP = dml_min(MaxLinkBPP, 32); in dml32_TruncToValidBPP() 4215 min_row_time = dml_min(dpte_row_height * in dml32_CalculateFlipSchedule() 4218 min_row_time = dml_min(meta_row_height * in dml32_CalculateFlipSchedule() 5709 / dml_min(NetDCCRateLuma[k], in dml32_CalculateStutterEfficiency() 5737 / dml_min(NetDCCRateChroma[k], in dml32_CalculateStutterEfficiency() 5791 EffectiveCompressedBufferSize = dml_min( in dml32_CalculateStutterEfficiency() [all …]
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| A D | display_mode_vba_32.c | 792 dml_min(v->VStartupLines, v->MaxVStartupLines[k]), in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 842 v->VStartup[k] = dml_min(v->VStartupLines, v->MaxVStartupLines[k]); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1950 …v->MaximumSwathWidthLuma[k] = dml_min(v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.Ma… in dml32_ModeSupportAndSystemConfigurationFull() 1952 …v->MaximumSwathWidthChroma[k] = dml_min(v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.… in dml32_ModeSupportAndSystemConfigurationFull() 3300 dml_min(v->MaxVStartup, v->MaximumVStartup[i][j][k]), in dml32_ModeSupportAndSystemConfigurationFull()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| A D | display_mode_vba_20.c | 257 dml_min( in adjust_ReturnBW() 280 dml_min( in adjust_ReturnBW() 1037 dml_min( in CalculateVMAndRowBytes() 1157 dml_min( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1615 dml_min( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2167 dml_min( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2410 dml_min( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2422 dml_min( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2534 dml_min( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 3817 dml_min( in dml20_ModeSupportAndSystemConfigurationFull() [all …]
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| A D | display_mode_vba_20v2.c | 281 dml_min( in adjust_ReturnBW() 304 dml_min( in adjust_ReturnBW() 1097 dml_min( in CalculateVMAndRowBytes() 1217 dml_min( in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1651 dml_min( in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2201 dml_min( in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2444 dml_min( in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2456 dml_min( in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2568 dml_min( in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 3924 dml_min( in dml20v2_ModeSupportAndSystemConfigurationFull() [all …]
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| A D | display_rq_dlg_calc_20.c | 134 * dml_min((double) recout_width, (double) hactive / 2.0) in get_refcyc_per_delivery() 603 log2_dpte_row_height_linear = dml_floor(dml_log2(dml_min(64 * 1024 * pde_buf_entries in get_meta_and_pte_attr()
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| A D | display_rq_dlg_calc_20v2.c | 134 * dml_min((double) recout_width, (double) hactive / 2.0) in get_refcyc_per_delivery() 603 log2_dpte_row_height_linear = dml_floor(dml_log2(dml_min(64 * 1024 * pde_buf_entries in get_meta_and_pte_attr()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| A D | display_mode_vba_314.c | 2027 v->ReturnBW = dml_min( 2031 v->ReturnBW = dml_min( 2060 v->PSCL_THROUGHPUT_LUMA[k] = dml_min( 2477 VMDataOnlyReturnBW = dml_min( 4041 v->PSCL_FACTOR[k] = dml_min( 4059 v->PSCL_FACTOR_CHROMA[k] = dml_min( 5163 dml_min( 5216 VMDataOnlyReturnBWPerState = dml_min( 5217 dml_min( 6984 swath_width_chroma_ub[k] = dml_min( [all …]
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| A D | display_rq_dlg_calc_314.c | 147 …* dml_min((double) recout_width, (double) hactive / ((unsigned int) odm_combine * 2)) / pclk_freq_… in get_refcyc_per_delivery() 781 vp_width = dml_min(full_src_vp_width, src_hactive_odm); in get_surf_rq_param() 784 vp_height = dml_min(full_src_vp_width, src_hactive_odm); in get_surf_rq_param()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| A D | display_mode_vba_31.c | 2009 v->ReturnBW = dml_min( 2013 v->ReturnBW = dml_min( 2042 v->PSCL_THROUGHPUT_LUMA[k] = dml_min( 2458 VMDataOnlyReturnBW = dml_min( 3950 v->PSCL_FACTOR[k] = dml_min( 3968 v->PSCL_FACTOR_CHROMA[k] = dml_min( 5077 dml_min( 5130 VMDataOnlyReturnBWPerState = dml_min( 5131 dml_min( 6894 swath_width_chroma_ub[k] = dml_min( [all …]
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| A D | display_rq_dlg_calc_31.c | 59 …* dml_min((double) recout_width, (double) hactive / ((unsigned int) odm_combine * 2)) / pclk_freq_… in get_refcyc_per_delivery() 693 vp_width = dml_min(full_src_vp_width, src_hactive_odm); in get_surf_rq_param() 696 vp_height = dml_min(full_src_vp_width, src_hactive_odm); in get_surf_rq_param()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| A D | display_mode_vba_30.c | 1802 *dpte_row_height = dml_min(*PixelPTEReqWidth, *MacroTileWidth); in CalculateVMAndRowBytes() 1894 v->PSCL_THROUGHPUT_LUMA[k] = dml_min( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1900 * dml_max(v->vtaps[k] / 6.0 * dml_min(1.0, v->HRatio[k]), in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1919 v->PSCL_THROUGHPUT_CHROMA[k] = dml_min( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2453 dml_min(v->VStartupLines, v->MaxVStartupLines[k]), in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2994 v->VStartupMargin = dml_min(v->VStartupMargin, margin); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 3769 v->VTAPsChroma[k] / 6.0 * dml_min(1.0, v->HRatioChroma[k]), in dml30_ModeSupportAndSystemConfigurationFull() 4051 dml_min(600.0, v->PHYCLKPerState[i]) * 10, in dml30_ModeSupportAndSystemConfigurationFull() 4685 v->MaxTotalVerticalActiveAvailableBandwidth[i][j] = dml_min( in dml30_ModeSupportAndSystemConfigurationFull() 4785 dml_min(v->MaxVStartup, v->MaximumVStartup[i][j][k]), in dml30_ModeSupportAndSystemConfigurationFull() [all …]
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| A D | display_rq_dlg_calc_30.c | 58 * dml_min((double)recout_width, (double)hactive / ((unsigned int)odm_combine*2)) in get_refcyc_per_delivery() 697 vp_width = dml_min(full_src_vp_width, src_hactive_odm); in get_surf_rq_param() 700 vp_height = dml_min(full_src_vp_width, src_hactive_odm); in get_surf_rq_param()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| A D | display_mode_vba_21.c | 1518 * dml_min( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1541 dml_min( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1560 * dml_min( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2234 dml_min( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2755 dml_min( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 3701 * dml_min( in dml21_ModeSupportAndSystemConfigurationFull() 3882 * dml_min( in dml21_ModeSupportAndSystemConfigurationFull() 3898 dml_min( in dml21_ModeSupportAndSystemConfigurationFull() 3916 * dml_min( in dml21_ModeSupportAndSystemConfigurationFull() 4013 dml_min( in dml21_ModeSupportAndSystemConfigurationFull() [all …]
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| A D | display_rq_dlg_calc_21.c | 110 * dml_min((double) recout_width, (double) hactive / 2.0) in get_refcyc_per_delivery() 603 dml_min( in get_meta_and_pte_attr() 728 vp_width = dml_min(full_src_vp_width, src_hactive_half); in get_surf_rq_param() 731 vp_height = dml_min(full_src_vp_width, src_hactive_half); in get_surf_rq_param()
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| /drivers/gpu/drm/amd/display/dc/dml2/ |
| A D | display_mode_util.c | 124 dml_float_t dml_min(dml_float_t x, dml_float_t y) in dml_min() function 138 return dml_min(dml_min(x, y), z); in dml_min3() 143 return dml_min(dml_min(dml_min(x, y), z), w); in dml_min4()
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| A D | display_mode_core.c | 2655 *dpte_row_height = (dml_uint_t)(dml_min(*PixelPTEReqWidth, MacroTileWidth)); in CalculateVMAndRowBytes() 2774 MaxLinkBPP = dml_min(MaxLinkBPP, 16); in TruncToValidBPP() 2776 MaxLinkBPP = dml_min(MaxLinkBPP, 32); in TruncToValidBPP() 2782 MaxLinkBPP = dml_min(MaxLinkBPP, 16); in TruncToValidBPP() 2784 MaxLinkBPP = dml_min(MaxLinkBPP, 32); in TruncToValidBPP() 4978 NextDETBufferPieceInKByte = (dml_uint_t)(dml_min( in CalculateDETBufferSize() 5662 *PSCL_THROUGHPUT = dml_min(MaxDCHUBToPSCLThroughput, MaxPSCLToLBThroughput); in CalculateSinglePipeDPPCLKAndSCLThroughput() 5677 *PSCL_THROUGHPUT_CHROMA = dml_min(MaxDCHUBToPSCLThroughput, MaxPSCLToLBThroughput); in CalculateSinglePipeDPPCLKAndSCLThroughput() 6199 vblank_size = (dml_uint_t) dml_min(vblank_actual, vblank_avail); in CalculateMaxVStartup() 6214 max_vstartup_lines = (dml_uint_t) dml_min(max_vstartup_lines, DML_MAX_VSTARTUP_START); in CalculateMaxVStartup() [all …]
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| A D | display_mode_util.h | 40 __DML_DLL_EXPORT__ dml_float_t dml_min(dml_float_t x, dml_float_t y);
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