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Searched refs:dml_pow (Results 1 – 14 of 14) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dml/dcn32/
A Ddisplay_rq_dlg_calc_32.c555 ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13)); in dml32_rq_dlg_get_dlg_reg()
556 ASSERT(refcyc_per_req_delivery_l < dml_pow(2, 13)); in dml32_rq_dlg_get_dlg_reg()
557 ASSERT(refcyc_per_req_delivery_pre_c < dml_pow(2, 13)); in dml32_rq_dlg_get_dlg_reg()
558 ASSERT(refcyc_per_req_delivery_c < dml_pow(2, 13)); in dml32_rq_dlg_get_dlg_reg()
560 dlg_regs->refcyc_per_vm_group_vblank = dml_pow(2, 23) - 1; in dml32_rq_dlg_get_dlg_reg()
563 dlg_regs->refcyc_per_vm_group_flip = dml_pow(2, 23) - 1; in dml32_rq_dlg_get_dlg_reg()
566 dlg_regs->refcyc_per_vm_req_vblank = dml_pow(2, 23) - 1; in dml32_rq_dlg_get_dlg_reg()
569 dlg_regs->refcyc_per_vm_req_flip = dml_pow(2, 23) - 1; in dml32_rq_dlg_get_dlg_reg()
607 ASSERT(ttu_regs->qos_level_low_wm < dml_pow(2, 14)); in dml32_rq_dlg_get_dlg_reg()
608 ASSERT(ttu_regs->qos_level_high_wm < dml_pow(2, 14)); in dml32_rq_dlg_get_dlg_reg()
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/drivers/gpu/drm/amd/display/dc/dml2/
A Ddml_display_rq_dlg_calc.c315 ASSERT(disp_dlg_regs->refcyc_h_blank_end < (dml_uint_t)dml_pow(2, 13)); in dml_rq_dlg_get_dlg_reg()
318 temp = dml_pow(2, 8); in dml_rq_dlg_get_dlg_reg()
412 ASSERT(disp_dlg_regs->min_dst_y_next_start < (dml_uint_t)dml_pow(2, 18)); in dml_rq_dlg_get_dlg_reg()
504 ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13)); in dml_rq_dlg_get_dlg_reg()
505 ASSERT(refcyc_per_req_delivery_l < dml_pow(2, 13)); in dml_rq_dlg_get_dlg_reg()
506 ASSERT(refcyc_per_req_delivery_pre_c < dml_pow(2, 13)); in dml_rq_dlg_get_dlg_reg()
507 ASSERT(refcyc_per_req_delivery_c < dml_pow(2, 13)); in dml_rq_dlg_get_dlg_reg()
511 if (disp_dlg_regs->refcyc_per_vm_group_flip >= (dml_uint_t)dml_pow(2, 23)) in dml_rq_dlg_get_dlg_reg()
514 if (disp_dlg_regs->refcyc_per_vm_req_vblank >= (dml_uint_t)dml_pow(2, 23)) in dml_rq_dlg_get_dlg_reg()
517 if (disp_dlg_regs->refcyc_per_vm_req_flip >= (dml_uint_t)dml_pow(2, 23)) in dml_rq_dlg_get_dlg_reg()
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A Ddisplay_mode_util.h50 __DML_DLL_EXPORT__ dml_float_t dml_pow(dml_float_t base, int exp);
A Ddisplay_mode_util.c196 dml_float_t dml_pow(dml_float_t base, int exp) in dml_pow() function
/drivers/gpu/drm/amd/display/dc/dml/dcn21/
A Ddisplay_rq_dlg_calc_21.c969 * dml_pow(2, 8)); in dml_rq_dlg_get_dlg_params()
1482 < (unsigned int)dml_pow(2, 13)); in dml_rq_dlg_get_dlg_params()
1526 / (double) vratio_l * dml_pow(2, 2)); in dml_rq_dlg_get_dlg_params()
1537 (unsigned int)dml_pow(2, 17) - 1); in dml_rq_dlg_get_dlg_params()
1542 / (double) vratio_l * dml_pow(2, 2)); in dml_rq_dlg_get_dlg_params()
1601 * dml_pow(2, 10)); in dml_rq_dlg_get_dlg_params()
1603 * dml_pow(2, 10)); in dml_rq_dlg_get_dlg_params()
1605 * dml_pow(2, 10)); in dml_rq_dlg_get_dlg_params()
1607 * dml_pow(2, 10)); in dml_rq_dlg_get_dlg_params()
1611 * dml_pow(2, 10)); in dml_rq_dlg_get_dlg_params()
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/drivers/gpu/drm/amd/display/dc/dml/dcn31/
A Ddisplay_rq_dlg_calc_31.c826 ASSERT(*refcyc_per_req_delivery_pre_cur < dml_pow(2, 13)); in calculate_ttu_cursor()
841 ASSERT(*refcyc_per_req_delivery_cur < dml_pow(2, 13)); in calculate_ttu_cursor()
1318 …ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13)); ASSERT(refcyc_per_req_delivery_l < dml_pow… in dml_rq_dlg_get_dlg_params()
1355 …ASSERT(refcyc_per_req_delivery_pre_c < dml_pow(2, 13)); ASSERT(refcyc_per_req_delivery_c < dml_pow… in dml_rq_dlg_get_dlg_params()
1449 disp_dlg_regs->refcyc_per_vm_group_flip = dml_pow(2, 23) - 1; in dml_rq_dlg_get_dlg_params()
1452 disp_dlg_regs->refcyc_per_vm_req_vblank = dml_pow(2, 23) - 1; in dml_rq_dlg_get_dlg_params()
1455 disp_dlg_regs->refcyc_per_vm_req_flip = dml_pow(2, 23) - 1; in dml_rq_dlg_get_dlg_params()
1466 (unsigned int) dml_pow(2, 17) - 1); in dml_rq_dlg_get_dlg_params()
1523 ASSERT(disp_ttu_regs->qos_level_low_wm < dml_pow(2, 14)); in dml_rq_dlg_get_dlg_params()
1526 ASSERT(disp_ttu_regs->qos_level_high_wm < dml_pow(2, 14)); in dml_rq_dlg_get_dlg_params()
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/drivers/gpu/drm/amd/display/dc/dml/dcn30/
A Ddisplay_rq_dlg_calc_30.c1040 * dml_pow(2, 8)); in dml_rq_dlg_get_dlg_params()
1051 ) * dml_pow(2, 2)); in dml_rq_dlg_get_dlg_params()
1576 < (unsigned int)dml_pow(2, 13)); in dml_rq_dlg_get_dlg_params()
1618 / (double)vratio_l * dml_pow(2, 2)); in dml_rq_dlg_get_dlg_params()
1628 (unsigned int)dml_pow(2, 17) - 1); in dml_rq_dlg_get_dlg_params()
1690 * dml_pow(2, 10)); in dml_rq_dlg_get_dlg_params()
1692 * dml_pow(2, 10)); in dml_rq_dlg_get_dlg_params()
1694 * dml_pow(2, 10)); in dml_rq_dlg_get_dlg_params()
1696 * dml_pow(2, 10)); in dml_rq_dlg_get_dlg_params()
1700 * dml_pow(2, 10)); in dml_rq_dlg_get_dlg_params()
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/drivers/gpu/drm/amd/display/dc/dml/dcn314/
A Ddisplay_rq_dlg_calc_314.c912 ASSERT(*refcyc_per_req_delivery_pre_cur < dml_pow(2, 13)); in calculate_ttu_cursor()
926 ASSERT(*refcyc_per_req_delivery_cur < dml_pow(2, 13)); in calculate_ttu_cursor()
1406 …ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13)); ASSERT(refcyc_per_req_delivery_l < dml_pow… in dml_rq_dlg_get_dlg_params()
1443 …ASSERT(refcyc_per_req_delivery_pre_c < dml_pow(2, 13)); ASSERT(refcyc_per_req_delivery_c < dml_pow… in dml_rq_dlg_get_dlg_params()
1537 disp_dlg_regs->refcyc_per_vm_group_flip = dml_pow(2, 23) - 1; in dml_rq_dlg_get_dlg_params()
1540 disp_dlg_regs->refcyc_per_vm_req_vblank = dml_pow(2, 23) - 1; in dml_rq_dlg_get_dlg_params()
1543 disp_dlg_regs->refcyc_per_vm_req_flip = dml_pow(2, 23) - 1; in dml_rq_dlg_get_dlg_params()
1554 (unsigned int) dml_pow(2, 17) - 1); in dml_rq_dlg_get_dlg_params()
1611 ASSERT(disp_ttu_regs->qos_level_low_wm < dml_pow(2, 14)); in dml_rq_dlg_get_dlg_params()
1614 ASSERT(disp_ttu_regs->qos_level_high_wm < dml_pow(2, 14)); in dml_rq_dlg_get_dlg_params()
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/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddisplay_rq_dlg_calc_20.c923 * dml_pow(2, 8)); in dml20_rq_dlg_get_dlg_params()
1399 < (unsigned int) dml_pow(2, 13)); in dml20_rq_dlg_get_dlg_params()
1423 / (double) vratio_l * dml_pow(2, 2)); in dml20_rq_dlg_get_dlg_params()
1433 (unsigned int) dml_pow(2, 17) - 1); in dml20_rq_dlg_get_dlg_params()
1438 / (double) vratio_l * dml_pow(2, 2)); in dml20_rq_dlg_get_dlg_params()
1493 * dml_pow(2, 10)); in dml20_rq_dlg_get_dlg_params()
1495 * dml_pow(2, 10)); in dml20_rq_dlg_get_dlg_params()
1497 * dml_pow(2, 10)); in dml20_rq_dlg_get_dlg_params()
1499 * dml_pow(2, 10)); in dml20_rq_dlg_get_dlg_params()
1503 * dml_pow(2, 10)); in dml20_rq_dlg_get_dlg_params()
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A Ddisplay_rq_dlg_calc_20v2.c923 * dml_pow(2, 8)); in dml20v2_rq_dlg_get_dlg_params()
1400 < (unsigned int) dml_pow(2, 13)); in dml20v2_rq_dlg_get_dlg_params()
1424 / (double) vratio_l * dml_pow(2, 2)); in dml20v2_rq_dlg_get_dlg_params()
1434 (unsigned int) dml_pow(2, 17) - 1); in dml20v2_rq_dlg_get_dlg_params()
1439 / (double) vratio_l * dml_pow(2, 2)); in dml20v2_rq_dlg_get_dlg_params()
1494 * dml_pow(2, 10)); in dml20v2_rq_dlg_get_dlg_params()
1496 * dml_pow(2, 10)); in dml20v2_rq_dlg_get_dlg_params()
1498 * dml_pow(2, 10)); in dml20v2_rq_dlg_get_dlg_params()
1500 * dml_pow(2, 10)); in dml20v2_rq_dlg_get_dlg_params()
1504 * dml_pow(2, 10)); in dml20v2_rq_dlg_get_dlg_params()
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A Ddisplay_mode_vba_20.c289 / dml_pow( in adjust_ReturnBW()
3466 dml_pow((locals->ReturnBWToDCNPerState * locals->UrgentLatency in dml20_ModeSupportAndSystemConfigurationFull()
3489 dml_pow((locals->ReturnBWToDCNPerState * locals->UrgentLatency in dml20_ModeSupportAndSystemConfigurationFull()
A Ddisplay_mode_vba_20v2.c313 / dml_pow( in adjust_ReturnBW()
3573 dml_pow((locals->ReturnBWToDCNPerState * locals->UrgentLatency in dml20v2_ModeSupportAndSystemConfigurationFull()
3596 dml_pow((locals->ReturnBWToDCNPerState * locals->UrgentLatency in dml20v2_ModeSupportAndSystemConfigurationFull()
/drivers/gpu/drm/amd/display/dc/dml/
A Ddml1_display_rq_dlg_calc.c1155 * dml_pow(2, 8)); in dml1_rq_dlg_get_dlg_params()
1175 + min_dst_y_ttu_vblank) * dml_pow(2, 2)); in dml1_rq_dlg_get_dlg_params()
1559 / (double) vratio_l * dml_pow(2, 2)); in dml1_rq_dlg_get_dlg_params()
1563 / (double) vratio_c * dml_pow(2, 2)); in dml1_rq_dlg_get_dlg_params()
1567 / (double) vratio_l * dml_pow(2, 2)); in dml1_rq_dlg_get_dlg_params()
1771 * dml_pow(2, 10)); in dml1_rq_dlg_get_dlg_params()
1773 * dml_pow(2, 10)); in dml1_rq_dlg_get_dlg_params()
1775 ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13)); in dml1_rq_dlg_get_dlg_params()
1776 ASSERT(refcyc_per_req_delivery_l < dml_pow(2, 13)); in dml1_rq_dlg_get_dlg_params()
1810 * dml_pow(2, 10)); in dml1_rq_dlg_get_dlg_params()
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A Ddml_inline_defs.h104 static inline double dml_pow(double a, int exp) in dml_pow() function

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