Searched refs:dpa_base (Results 1 – 6 of 6) sorted by relevance
| /drivers/cxl/core/ |
| A D | hdm.c | 946 struct cxl_port *port, struct cxl_decoder *cxld, u64 *dpa_base, in cxl_setup_hdm_decoder_from_dvsec() argument 973 rc = devm_cxl_dpa_reserve(cxled, *dpa_base, len, 0); in cxl_setup_hdm_decoder_from_dvsec() 977 port->id, cxld->id, *dpa_base, *dpa_base + len - 1, rc); in cxl_setup_hdm_decoder_from_dvsec() 980 *dpa_base += len; in cxl_setup_hdm_decoder_from_dvsec() 988 u64 *dpa_base, struct cxl_endpoint_dvsec_info *info) in init_hdm_decoder() argument 1002 return cxl_setup_hdm_decoder_from_dvsec(port, cxld, dpa_base, in init_hdm_decoder() 1128 port->id, cxld->id, *dpa_base, in init_hdm_decoder() 1129 *dpa_base + dpa_size + skip - 1, rc); in init_hdm_decoder() 1132 *dpa_base += dpa_size + skip; in init_hdm_decoder() 1177 u64 dpa_base = 0; in devm_cxl_enumerate_decoders() local [all …]
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| /drivers/gpu/drm/xe/ |
| A D | xe_vram.c | 156 xe->mem.vram.dpa_base = 0; in determine_lmem_bar_size() 343 tile->mem.vram.dpa_base = xe->mem.vram.dpa_base + tile_offset; in xe_vram_probe() 352 &tile->mem.vram.dpa_base, tile->mem.vram.dpa_base + (u64)tile->mem.vram.actual_physical_size, in xe_vram_probe()
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| A D | xe_device_types.h | 93 resource_size_t dpa_base; member
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| A D | xe_migrate.c | 135 addr -= xe->mem.vram.dpa_base; in xe_migrate_vram_ofs() 146 xe->mem.vram.dpa_base; in xe_migrate_program_identity() 160 for (pos = xe->mem.vram.dpa_base; pos < vram_limit; in xe_migrate_program_identity()
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| A D | xe_svm.c | 326 dpa = vr->dpa_base + offset; in xe_vram_region_page_to_dpa()
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| A D | xe_bo.c | 2264 return res_to_mem_region(res)->dpa_base; in vram_region_gpu_offset()
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