Searched refs:dpcd_buf (Results 1 – 3 of 3) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/link/protocols/ |
| A D | link_dp_training.c | 560 uint8_t dpcd_buf[6] = {0}; in dp_check_link_loss_status() local
566 (uint8_t *)(dpcd_buf), in dp_check_link_loss_status()
567 sizeof(dpcd_buf)); in dp_check_link_loss_status()
605 uint8_t dpcd_buf[6] = {0}; in dp_get_lane_status_and_lane_adjust() local
619 (uint8_t *)(dpcd_buf), in dp_get_lane_status_and_lane_adjust()
620 sizeof(dpcd_buf)); in dp_get_lane_status_and_lane_adjust()
640 ln_align->raw = dpcd_buf[2]; in dp_get_lane_status_and_lane_adjust()
647 lane01_status_address, dpcd_buf[0], in dp_get_lane_status_and_lane_adjust()
658 dpcd_buf[lane_adjust_offset], in dp_get_lane_status_and_lane_adjust()
672 dpcd_buf[lane_adjust_offset], in dp_get_lane_status_and_lane_adjust()
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| /drivers/gpu/drm/display/ |
| A D | drm_dp_helper.c | 4050 u8 dpcd_buf; in drm_edp_backlight_enable() local
4053 dpcd_buf = DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD; in drm_edp_backlight_enable()
4055 dpcd_buf = DP_EDP_BACKLIGHT_CONTROL_MODE_PWM; in drm_edp_backlight_enable()
4058 dpcd_buf |= DP_EDP_PANEL_LUMINANCE_CONTROL_ENABLE; in drm_edp_backlight_enable()
4075 dpcd_buf |= DP_EDP_BACKLIGHT_FREQ_AUX_SET_ENABLE; in drm_edp_backlight_enable()
4078 ret = drm_dp_dpcd_write_byte(aux, DP_EDP_BACKLIGHT_MODE_SET_REGISTER, dpcd_buf); in drm_edp_backlight_enable()
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| /drivers/gpu/drm/amd/display/dc/link/ |
| A D | link_dpms.c | 1180 uint8_t dpcd_buf[3] = {0}; in get_lane_status() local
1189 dpcd_buf, in get_lane_status()
1190 sizeof(dpcd_buf)); in get_lane_status()
1193 status[lane].raw = dp_get_nibble_at_index(&dpcd_buf[0], lane); in get_lane_status()
1196 status_updated->raw = dpcd_buf[2]; in get_lane_status()
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