| /drivers/gpu/drm/amd/display/dc/link/protocols/ |
| A D | link_dp_capability.c | 1041 link->dpcd_caps.branch_dev_id = in read_dp_device_vendor_id() 1140 memset(&link->dpcd_caps.dongle_caps, 0, sizeof(link->dpcd_caps.dongle_caps)); in get_active_converter_info() 1146 link->dpcd_caps.dongle_type); in get_active_converter_info() 1194 link->dpcd_caps.dongle_caps.dongle_type = link->dpcd_caps.dongle_type; in get_active_converter_info() 1343 link->dpcd_caps.dpcd_rev.raw = in dp_overwrite_extended_receiver_cap() 1791 link->dpcd_caps.dpcd_rev.raw = in retrieve_link_cap() 1900 link->dpcd_caps.sink_dev_id = in retrieve_link_cap() 1946 memset(&link->dpcd_caps.fec_cap, '\0', sizeof(link->dpcd_caps.fec_cap)); in retrieve_link_cap() 2005 memset(&link->dpcd_caps.dsc_caps, '\0', sizeof(link->dpcd_caps.dsc_caps)); in retrieve_link_cap() 2006 memset(&link->dpcd_caps.fec_cap, '\0', sizeof(link->dpcd_caps.fec_cap)); in retrieve_link_cap() [all …]
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| A D | link_dp_dpia.c | 65 link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.raw = in dpcd_get_tunneling_device_data() 71 link->dpcd_caps.usb4_dp_tun_info.dpia_info.raw = in dpcd_get_tunneling_device_data() 73 link->dpcd_caps.usb4_dp_tun_info.usb4_driver_id = in dpcd_get_tunneling_device_data() 76 if (link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dpia_bw_alloc) { in dpcd_get_tunneling_device_data() 83 link->dpcd_caps.usb4_dp_tun_info.driver_bw_cap.raw = in dpcd_get_tunneling_device_data() 85 link->dpcd_caps.usb4_dp_tun_info.dpia_tunnel_info.raw = in dpcd_get_tunneling_device_data() 93 link->dpcd_caps.usb4_dp_tun_info.usb4_driver_id, in dpcd_get_tunneling_device_data() 94 link->dpcd_caps.usb4_dp_tun_info.dpia_info.bits.dpia_num, in dpcd_get_tunneling_device_data() 95 link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dpia_bw_alloc, in dpcd_get_tunneling_device_data() 158 link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling; in link_decide_dp_tunnel_settings() [all …]
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| A D | link_ddc.c | 218 link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_0080E1 && in defer_delay_converter_wa() 219 (link->dpcd_caps.branch_fw_revision[0] < 0x01 || in defer_delay_converter_wa() 220 (link->dpcd_caps.branch_fw_revision[0] == 0x01 && in defer_delay_converter_wa() 221 link->dpcd_caps.branch_fw_revision[1] < 0x40)) && in defer_delay_converter_wa() 222 !memcmp(link->dpcd_caps.branch_dev_name, in defer_delay_converter_wa() 224 sizeof(link->dpcd_caps.branch_dev_name))) in defer_delay_converter_wa() 230 !memcmp(link->dpcd_caps.branch_dev_name, in defer_delay_converter_wa() 232 sizeof(link->dpcd_caps.branch_dev_name))) in defer_delay_converter_wa() 236 !memcmp(link->dpcd_caps.branch_dev_name, in defer_delay_converter_wa() 238 sizeof(link->dpcd_caps.branch_dev_name))) in defer_delay_converter_wa() [all …]
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| A D | link_edp_panel_control.c | 97 link->dpcd_caps.panel_mode_edp, in dp_set_panel_mode() 109 switch (link->dpcd_caps.branch_dev_id) { in dp_get_panel_mode() 118 link->dpcd_caps.branch_dev_name, in dp_get_panel_mode() 121 link->dpcd_caps. in dp_get_panel_mode() 132 if (strncmp(link->dpcd_caps.branch_dev_name, in dp_get_panel_mode() 135 link->dpcd_caps. in dp_get_panel_mode() 145 if (link->dpcd_caps.panel_mode_edp && in dp_get_panel_mode() 164 if (link->is_dds && !link->dpcd_caps.panel_luminance_control) in edp_set_backlight_level_nits() 294 if (!link->dpcd_caps.panel_luminance_control) { in read_default_bl_aux() 342 if (max_ilr_rate < link->dpcd_caps.edp_supported_link_rates[i]) in get_max_edp_link_rate() [all …]
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| A D | link_dp_dpia_bw.c | 52 && link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling in link_dp_is_bw_alloc_available() 53 && link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dpia_bw_alloc in link_dp_is_bw_alloc_available() 54 && link->dpcd_caps.usb4_dp_tun_info.driver_bw_cap.bits.driver_bw_alloc_support); in link_dp_is_bw_alloc_available() 298 if (link && link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling in dpia_handle_usb4_bandwidth_allocation_for_link() 334 !link->dpcd_caps.channel_coding_cap.bits.DP_128b_132b_SUPPORTED) { in link_dpia_get_dp_overhead()
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| A D | link_dp_training.c | 542 link->dpcd_caps.lttpr_caps.aux_rd_interval[offset - 1]); in dp_get_eq_aux_rd_interval() 808 struct dpcd_caps *rx_caps = &link->dpcd_caps; in decide_eq_training_pattern() 939 link->dpcd_caps.lttpr_caps.mode = repeater_mode; in configure_lttpr_mode_non_transparent() 953 link->dpcd_caps.lttpr_caps.mode = repeater_mode; in configure_lttpr_mode_non_transparent() 963 link->dpcd_caps.lttpr_caps.aux_rd_interval[--repeater_cnt] = 0; in configure_lttpr_mode_non_transparent() 971 (uint8_t *)&link->dpcd_caps.lttpr_caps.aux_rd_interval[repeater_id - 1], in configure_lttpr_mode_non_transparent() 972 sizeof(link->dpcd_caps.lttpr_caps.aux_rd_interval[repeater_id - 1])); in configure_lttpr_mode_non_transparent() 973 link->dpcd_caps.lttpr_caps.aux_rd_interval[repeater_id - 1] &= 0x7F; in configure_lttpr_mode_non_transparent() 1111 link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED; in dpcd_set_link_settings() 1124 if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_13 && in dpcd_set_link_settings() [all …]
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| A D | link_dp_training_fixed_vs_pe_retimer.c | 147 repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in perform_fixed_vs_pe_nontransparent_training_sequence() 196 link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in dp_perform_fixed_vs_pe_training_sequence() 262 link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED; in dp_perform_fixed_vs_pe_training_sequence() 274 if (memcmp("\x0,\x0,\x0", &link->dpcd_caps.lttpr_caps.lttpr_ieee_oui[0], 3) == 0) { in dp_perform_fixed_vs_pe_training_sequence()
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| A D | link_dp_training_dpia.c | 306 repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in dpia_training_cr_non_transparent() 609 repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in dpia_training_eq_non_transparent() 870 repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in dpia_training_end() 931 link->dpcd_caps.lttpr_caps.aux_rd_interval[hop - 1]); in dpia_get_eq_aux_rd_interval() 982 repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in dpia_set_tps_notification() 1009 repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in dpia_perform_link_training()
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| A D | link_dp_irq_handler.c | 348 if (link->dpcd_caps.dpcd_rev.raw < DPCD_REV_14) { in dp_read_hpd_rx_irq_data() 355 if (link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling) { in dp_read_hpd_rx_irq_data() 524 if (link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling) { in dp_handle_hpd_rx_irq()
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| A D | link_dp_training_8b_10b.c | 58 if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_12) in get_cr_training_aux_rd_interval() 91 if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_12) in get_eq_training_aux_rd_interval() 430 uint8_t repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in dp_perform_8b_10b_link_training()
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| A D | link_dp_phy.c | 93 return (dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt) == in is_immediate_downstream()
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| /drivers/gpu/drm/amd/display/amdgpu_dm/ |
| A D | amdgpu_dm_replay.c | 44 struct dpcd_caps *dpcd_caps = &link->dpcd_caps; in amdgpu_dm_link_supports_replay() local 45 struct adaptive_sync_caps *as_caps = &link->dpcd_caps.adaptive_sync_caps; in amdgpu_dm_link_supports_replay() 54 if (dpcd_caps->edp_rev < EDP_REVISION_13) in amdgpu_dm_link_supports_replay() 57 if (!dpcd_caps->alpm_caps.bits.AUX_WAKE_ALPM_CAP) in amdgpu_dm_link_supports_replay() 65 if (dpcd_caps->pr_info.pixel_deviation_per_line == 0 || in amdgpu_dm_link_supports_replay() 66 dpcd_caps->pr_info.max_deviation_line == 0) in amdgpu_dm_link_supports_replay()
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| A D | amdgpu_dm_psr.c | 46 if (!link->dpcd_caps.alpm_caps.bits.AUX_WAKE_ALPM_CAP || in link_supports_psrsu() 47 !link->dpcd_caps.psr_info.psr_dpcd_caps.bits.Y_COORDINATE_REQUIRED) in link_supports_psrsu() 50 if (link->dpcd_caps.psr_info.psr_dpcd_caps.bits.SU_GRANULARITY_REQUIRED && in link_supports_psrsu() 51 !link->dpcd_caps.psr_info.psr2_su_y_granularity_cap) in link_supports_psrsu() 78 if (link->dpcd_caps.psr_info.psr_version == 0) { in amdgpu_dm_set_psr_caps()
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| A D | amdgpu_dm_helpers.c | 803 memcmp(stream->link->dpcd_caps.branch_dev_name, in write_dsc_enable_synaptics_non_virtual_dpcd_mst() 891 if (stream->sink->link->dpcd_caps.dongle_type == DISPLAY_DONGLE_NONE) { in dm_helpers_dp_write_dsc_enable() 896 } else if (stream->sink->link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER) { in dm_helpers_dp_write_dsc_enable() 1386 struct dpcd_caps *dpcd_caps = &link->dpcd_caps; in dm_get_adaptive_sync_support_type() local 1389 switch (dpcd_caps->dongle_type) { in dm_get_adaptive_sync_support_type() 1391 if (dpcd_caps->adaptive_sync_caps.dp_adap_sync_caps.bits.ADAPTIVE_SYNC_SDP_SUPPORT == true && in dm_get_adaptive_sync_support_type() 1392 dpcd_caps->allow_invalid_MSA_timing_param == true && in dm_get_adaptive_sync_support_type() 1393 dm_is_freesync_pcon_whitelist(dpcd_caps->branch_dev_id)) in dm_get_adaptive_sync_support_type()
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| A D | amdgpu_dm_mst_types.c | 243 if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_90CC24 && in needs_dsc_aux_workaround() 244 (link->dpcd_caps.dpcd_rev.raw == DPCD_REV_14 || link->dpcd_caps.dpcd_rev.raw == DPCD_REV_12) && in needs_dsc_aux_workaround() 245 link->dpcd_caps.sink_count.bits.SINK_COUNT >= 2) in needs_dsc_aux_workaround() 257 if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_90CC24 && in is_synaptics_cascaded_panamera() 258 IS_SYNAPTICS_CASCADED_PANAMERA(link->dpcd_caps.branch_dev_name, branch_vendor_data)) { in is_synaptics_cascaded_panamera() 700 if (link_status->dpcd_caps->dpcd_rev.raw < 0x12) { in dm_handle_mst_sideband_msg_ready_event() 1329 (!(dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT || in is_dsc_need_re_compute() 1330 dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_PASSTHROUGH_SUPPORT))) in is_dsc_need_re_compute() 1584 &dc_link->dpcd_caps.dsc_caps.dsc_basic_caps; in is_link_to_dschub()
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| A D | amdgpu_dm_debugfs.c | 577 struct dc_lttpr_caps caps = aconnector->dc_link->dpcd_caps.lttpr_caps; in dp_lttpr_status_show() 1069 seq_printf(m, "Sink support: %s", str_yes_no(link->dpcd_caps.psr_info.psr_version != 0)); in psr_capability_show() 1070 if (link->dpcd_caps.psr_info.psr_version) in psr_capability_show() 1071 seq_printf(m, " [0x%02x]", link->dpcd_caps.psr_info.psr_version); in psr_capability_show() 1370 struct dpcd_caps dpcd_caps; in dp_dsc_fec_support_show() local 1390 dpcd_caps = aconnector->dc_link->dpcd_caps; in dp_dsc_fec_support_show() 1402 is_fec_supported = dpcd_caps.fec_cap.raw & 0x1; in dp_dsc_fec_support_show() 1403 is_dsc_supported = dpcd_caps.dsc_caps.dsc_basic_caps.raw[0] & 0x1; in dp_dsc_fec_support_show() 3371 dpcd_rev = link->dpcd_caps.dpcd_rev.raw; in edp_ilr_show() 3443 if (param[1] >= link->dpcd_caps.edp_supported_link_rates_count) in edp_ilr_write() [all …]
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| /drivers/gpu/drm/amd/display/dc/link/ |
| A D | link_detection.c | 614 link->dpcd_caps.dpcd_rev.raw = 0; in detect_dp() 842 if (link->dpcd_caps.is_mst_capable || in should_verify_link_capability_destructively() 882 struct dpcd_caps prev_dpcd_caps; in detect_link_and_local_sink() 914 memcpy(&prev_dpcd_caps, &link->dpcd_caps, sizeof(struct dpcd_caps)); in detect_link_and_local_sink() 961 sizeof(link->dpcd_caps.branch_dev_name)) == 0) { in detect_link_and_local_sink() 964 if (!link->dpcd_caps.set_power_state_capable_edp) in detect_link_and_local_sink() 1003 (link->dpcd_caps.dongle_type != in detect_link_and_local_sink() 1029 if (link->dpcd_caps.sink_count.bits.SINK_COUNT) in detect_link_and_local_sink() 1031 link->dpcd_caps.sink_count.bits.SINK_COUNT; in detect_link_and_local_sink() 1087 link->dpcd_caps.dongle_type == in detect_link_and_local_sink() [all …]
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| A D | link_validation.c | 58 const struct dpcd_caps *dpcd_caps) in dp_active_dongle_validate_timing() argument 60 const struct dc_dongle_caps *dongle_caps = &dpcd_caps->dongle_caps; in dp_active_dongle_validate_timing() 62 switch (dpcd_caps->dongle_type) { in dp_active_dongle_validate_timing() 74 if (dpcd_caps->dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER && in dp_active_dongle_validate_timing() 148 if (dpcd_caps->channel_coding_cap.bits.DP_128b_132b_SUPPORTED == 0 && in dp_active_dongle_validate_timing() 149 dpcd_caps->dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_PASSTHROUGH_SUPPORT == 0 && in dp_active_dongle_validate_timing() 285 !link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED && in dp_validate_mode_timing() 306 …bool is_max_uncompressed_pixel_rate_exceeded = link->dpcd_caps.max_uncompressed_pixel_rate_cap.bit… in dp_validate_mode_timing() 307 …timing->pix_clk_100hz > link->dpcd_caps.max_uncompressed_pixel_rate_cap.bits.max_uncompressed_pixe… in dp_validate_mode_timing() 338 struct dpcd_caps *dpcd_caps = &link->dpcd_caps; in link_validate_mode_timing() local [all …]
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| A D | link_factory.c | 469 link->link_status.dpcd_caps = &link->dpcd_caps; in construct_phy() 769 link->link_status.dpcd_caps = &link->dpcd_caps; in construct_dpia()
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| /drivers/gpu/drm/amd/display/modules/power/ |
| A D | power_helpers.c | 821 struct dpcd_caps *dpcd_caps = &link->dpcd_caps; in is_psr_su_specific_panel() local 823 if (dpcd_caps->edp_rev >= DP_EDP_14) { in is_psr_su_specific_panel() 824 if (dpcd_caps->psr_info.psr_version >= DP_PSR2_WITH_Y_COORD_ET_SUPPORTED) in is_psr_su_specific_panel() 831 if (dpcd_caps->sink_dev_id == DP_BRANCH_DEVICE_ID_001CF8) { in is_psr_su_specific_panel() 839 ((dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x08) || in is_psr_su_specific_panel() 840 (dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x07))) in is_psr_su_specific_panel() 842 else if (dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x03) in is_psr_su_specific_panel() 844 else if (dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x01) in is_psr_su_specific_panel() 846 else if (dpcd_caps->psr_info.force_psrsu_cap == 0x1) in is_psr_su_specific_panel() 885 struct dpcd_caps *dpcd_caps = &link->dpcd_caps; in mod_power_calc_psr_configs() local [all …]
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dmub_psr.c | 389 link->dpcd_caps.sink_dev_id == DP_DEVICE_ID_38EC11 && in dmub_psr_copy_settings() 390 !memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_1, in dmub_psr_copy_settings() 396 if (((link->dpcd_caps.fec_cap.bits.FEC_CAPABLE && in dmub_psr_copy_settings() 398 (link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT && in dmub_psr_copy_settings() 401 link->dpcd_caps.sink_dev_id == DP_DEVICE_ID_38EC11 && in dmub_psr_copy_settings() 402 (!memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_1, in dmub_psr_copy_settings() 404 !memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_2, in dmub_psr_copy_settings() 411 link->dpcd_caps.sink_dev_id == DP_DEVICE_ID_0022B9 && in dmub_psr_copy_settings() 412 !memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_3, in dmub_psr_copy_settings() 419 if (link->dpcd_caps.sink_dev_id == DP_BRANCH_DEVICE_ID_001CF8) in dmub_psr_copy_settings()
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| A D | dmub_replay.c | 203 copy_settings_data->pixel_deviation_per_line = link->dpcd_caps.pr_info.pixel_deviation_per_line; in dmub_replay_copy_settings() 204 copy_settings_data->max_deviation_line = link->dpcd_caps.pr_info.max_deviation_line; in dmub_replay_copy_settings() 214 if (((link->dpcd_caps.fec_cap.bits.FEC_CAPABLE && in dmub_replay_copy_settings() 216 (link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT && in dmub_replay_copy_settings() 219 link->dpcd_caps.sink_dev_id == DP_DEVICE_ID_38EC11 && in dmub_replay_copy_settings() 220 (!memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_1, in dmub_replay_copy_settings() 222 !memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_2, in dmub_replay_copy_settings()
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| /drivers/gpu/drm/amd/display/dc/hdcp/ |
| A D | hdcp_msg.c | 351 (link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_VGA_CONVERTER || in get_protection_properties_by_signal() 352 link->dpcd_caps.dongle_caps.dongle_type == DISPLAY_DONGLE_DP_VGA_CONVERTER)) { in get_protection_properties_by_signal()
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| /drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_link_exports.c | 337 if (link->dpcd_caps.dongle_type >= DISPLAY_DONGLE_DP_DVI_DONGLE && in dc_link_get_highest_encoding_format() 338 link->dpcd_caps.dongle_type <= DISPLAY_DONGLE_DP_HDMI_MISMATCHED_DONGLE) in dc_link_get_highest_encoding_format()
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| /drivers/gpu/drm/amd/display/dc/link/accessories/ |
| A D | link_dp_cts.c | 805 if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_12) { in dp_set_test_pattern() 825 } else if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_10 || in dp_set_test_pattern() 826 link->dpcd_caps.dpcd_rev.raw == 0) { in dp_set_test_pattern()
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