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Searched refs:dpte_row_height (Results 1 – 25 of 25) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dml/
A Ddml1_display_rq_dlg_calc.c614 unsigned int dpte_row_height; in get_surf_rq_param() local
808 dpte_row_height = 0; in get_surf_rq_param()
858 rq_dlg_param->dpte_row_height = 1 << log2_dpte_row_height; in get_surf_rq_param()
864 data_pitch * dpte_row_height - 1, in get_surf_rq_param()
883 rq_dlg_param->dpte_row_height = 1 << log2_dpte_row_height; in get_surf_rq_param()
895 rq_dlg_param->dpte_row_height = 1 << log2_dpte_row_height; in get_surf_rq_param()
950 if (rq_dlg_param->dpte_row_height != func_dpte_row_height) { in get_surf_rq_param()
953 rq_dlg_param->dpte_row_height); in get_surf_rq_param()
1555 dpte_row_height_l = rq_dlg_param->rq_l.dpte_row_height; in dml1_rq_dlg_get_dlg_params()
1556 dpte_row_height_c = rq_dlg_param->rq_c.dpte_row_height; in dml1_rq_dlg_get_dlg_params()
A Ddisplay_rq_dlg_helpers.c89 rq_dlg_param->dpte_row_height); in print__data_rq_dlg_params_st()
A Ddisplay_mode_structs.h588 unsigned int dpte_row_height; member
A Ddisplay_mode_vba.h830 unsigned int dpte_row_height[DC__NUM_DPP__MAX]; member
/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddisplay_rq_dlg_calc_20.c198 rq_regs->rq_regs_l.pte_row_height_linear = dml_floor(dml_log2(rq_param->dlg.rq_l.dpte_row_height), in extract_rq_regs()
203 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(dml_log2(rq_param->dlg.rq_c.dpte_row_height), in extract_rq_regs()
601 unsigned int dpte_row_height; in get_meta_and_pte_attr() local
618 dpte_row_height = 1 << log2_dpte_row_height; in get_meta_and_pte_attr()
619 dpte_row_width_ub = dml_round_to_multiple(data_pitch * dpte_row_height - 1, in get_meta_and_pte_attr()
645 rq_dlg_param->dpte_row_height = 1 << log2_dpte_row_height; in get_meta_and_pte_attr()
1138 dpte_row_height_l = rq_dlg_param->rq_l.dpte_row_height; in dml20_rq_dlg_get_dlg_params()
1139 dpte_row_height_c = rq_dlg_param->rq_c.dpte_row_height; in dml20_rq_dlg_get_dlg_params()
A Ddisplay_rq_dlg_calc_20v2.c198 rq_regs->rq_regs_l.pte_row_height_linear = dml_floor(dml_log2(rq_param->dlg.rq_l.dpte_row_height), in extract_rq_regs()
203 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(dml_log2(rq_param->dlg.rq_c.dpte_row_height), in extract_rq_regs()
601 unsigned int dpte_row_height; in get_meta_and_pte_attr() local
618 dpte_row_height = 1 << log2_dpte_row_height; in get_meta_and_pte_attr()
619 dpte_row_width_ub = dml_round_to_multiple(data_pitch * dpte_row_height - 1, in get_meta_and_pte_attr()
645 rq_dlg_param->dpte_row_height = 1 << log2_dpte_row_height; in get_meta_and_pte_attr()
1139 dpte_row_height_l = rq_dlg_param->rq_l.dpte_row_height; in dml20v2_rq_dlg_get_dlg_params()
1140 dpte_row_height_c = rq_dlg_param->rq_c.dpte_row_height; in dml20v2_rq_dlg_get_dlg_params()
A Ddisplay_mode_vba_20.c154 unsigned int *dpte_row_height,
213 unsigned int dpte_row_height,
878 unsigned int *dpte_row_height, in CalculateVMAndRowBytes() argument
1036 *dpte_row_height = in CalculateVMAndRowBytes()
1056 *dpte_row_height = PixelPTEReqHeight; in CalculateVMAndRowBytes()
1888 &mode_lib->vba.dpte_row_height[k], in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1967 mode_lib->vba.dpte_row_height[k], in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2287 mode_lib->vba.dpte_row_height[k], in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3097 unsigned int dpte_row_height, in CalculateFlipSchedule() argument
4521 &mode_lib->vba.dpte_row_height[k], in dml20_ModeSupportAndSystemConfigurationFull()
[all …]
A Ddisplay_mode_vba_20v2.c178 unsigned int *dpte_row_height,
237 unsigned int dpte_row_height,
938 unsigned int *dpte_row_height, in CalculateVMAndRowBytes() argument
1096 *dpte_row_height = in CalculateVMAndRowBytes()
1116 *dpte_row_height = PixelPTEReqHeight; in CalculateVMAndRowBytes()
1924 &mode_lib->vba.dpte_row_height[k], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2003 mode_lib->vba.dpte_row_height[k], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2321 mode_lib->vba.dpte_row_height[k], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3170 unsigned int dpte_row_height, in CalculateFlipSchedule() argument
4643 &mode_lib->vba.dpte_row_height[k], in dml20v2_ModeSupportAndSystemConfigurationFull()
[all …]
/drivers/gpu/drm/amd/display/dc/dml/dcn21/
A Ddisplay_rq_dlg_calc_21.c177 dml_log2(rq_param->dlg.rq_l.dpte_row_height), in extract_rq_regs()
183 dml_log2(rq_param->dlg.rq_c.dpte_row_height), in extract_rq_regs()
599 unsigned int dpte_row_height; in get_meta_and_pte_attr() local
619 dpte_row_height = 1 << log2_dpte_row_height; in get_meta_and_pte_attr()
621 data_pitch * dpte_row_height - 1, in get_meta_and_pte_attr()
647 rq_dlg_param->dpte_row_height = 1 << log2_dpte_row_height; in get_meta_and_pte_attr()
1190 dpte_row_height_l = rq_dlg_param->rq_l.dpte_row_height; in dml_rq_dlg_get_dlg_params()
1191 dpte_row_height_c = rq_dlg_param->rq_c.dpte_row_height; in dml_rq_dlg_get_dlg_params()
A Ddisplay_mode_vba_21.c195 unsigned int *dpte_row_height,
268 unsigned int dpte_row_height,
1280 unsigned int *dpte_row_height, in CalculateVMAndRowBytes()
1415 *dpte_row_height = dml_min(128, in CalculateVMAndRowBytes()
1961 &locals->dpte_row_height[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1991 locals->dpte_row_height[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2355 locals->dpte_row_height[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2522 locals->dpte_row_height, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3181 unsigned int dpte_row_height, in CalculateFlipSchedule() argument
4717 locals->dpte_row_height[k], in dml21_ModeSupportAndSystemConfigurationFull()
[all …]
/drivers/gpu/drm/amd/display/dc/dml/dcn30/
A Ddisplay_rq_dlg_calc_30.c122 rq_regs->rq_regs_l.pte_row_height_linear = dml_floor(dml_log2(rq_param->dlg.rq_l.dpte_row_height), in extract_rq_regs()
127 rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(dml_log2(rq_param->dlg.rq_c.dpte_row_height), in extract_rq_regs()
573 unsigned int dpte_row_height = 0; in get_meta_and_pte_attr() local
589 dpte_row_height = 1 << log2_dpte_row_height; in get_meta_and_pte_attr()
590 dpte_row_width_ub = dml_round_to_multiple(data_pitch * dpte_row_height - 1, in get_meta_and_pte_attr()
616 rq_dlg_param->dpte_row_height = 1 << log2_dpte_row_height; in get_meta_and_pte_attr()
1294 dpte_row_height_l = rq_dlg_param.rq_l.dpte_row_height; in dml_rq_dlg_get_dlg_params()
1295 dpte_row_height_c = rq_dlg_param.rq_c.dpte_row_height; in dml_rq_dlg_get_dlg_params()
A Ddisplay_mode_vba_30.c205 unsigned int *dpte_row_height,
261 unsigned int dpte_row_height,
451 int dpte_row_height[],
1792 *dpte_row_height = 1; in CalculateVMAndRowBytes()
2264 &v->dpte_row_height[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2305 v->dpte_row_height[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2668 v->dpte_row_height[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2862 v->dpte_row_height, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
4441 &v->dpte_row_height[k], in dml30_ModeSupportAndSystemConfigurationFull()
4480 v->dpte_row_height[k], in dml30_ModeSupportAndSystemConfigurationFull()
[all …]
/drivers/gpu/drm/amd/display/dc/dml/dcn31/
A Ddisplay_rq_dlg_calc_31.c119 …rq_regs->rq_regs_l.pte_row_height_linear = dml_floor(dml_log2(rq_param->dlg.rq_l.dpte_row_height),… in extract_rq_regs()
123 …rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(dml_log2(rq_param->dlg.rq_c.dpte_row_height),… in extract_rq_regs()
574 unsigned int dpte_row_height; in get_meta_and_pte_attr() local
590 dpte_row_height = 1 << log2_dpte_row_height; in get_meta_and_pte_attr()
591 …dpte_row_width_ub = dml_round_to_multiple(data_pitch * dpte_row_height - 1, dpte_req_width, 1) + d… in get_meta_and_pte_attr()
611 rq_dlg_param->dpte_row_height = 1 << log2_dpte_row_height; in get_meta_and_pte_attr()
1135 dpte_row_height_l = rq_dlg_param->rq_l.dpte_row_height; in dml_rq_dlg_get_dlg_params()
1136 dpte_row_height_c = rq_dlg_param->rq_c.dpte_row_height; in dml_rq_dlg_get_dlg_params()
A Ddisplay_mode_vba_31.c222 unsigned int *dpte_row_height,
415 int dpte_row_height[],
1813 unsigned int *dpte_row_height,
1944 *dpte_row_height = *PixelPTEReqHeight;
2395 &v->dpte_row_height[k],
2435 v->dpte_row_height[k],
3023 v->dpte_row_height,
3548 v->dpte_row_height[k] * LineTime / v->VRatio[k],
4842 &v->dpte_row_height[k],
4881 v->dpte_row_height[k],
[all …]
/drivers/gpu/drm/amd/display/dc/dml/dcn314/
A Ddisplay_rq_dlg_calc_314.c207 …rq_regs->rq_regs_l.pte_row_height_linear = dml_floor(dml_log2(rq_param->dlg.rq_l.dpte_row_height),… in extract_rq_regs()
211 …rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(dml_log2(rq_param->dlg.rq_c.dpte_row_height),… in extract_rq_regs()
662 unsigned int dpte_row_height; in get_meta_and_pte_attr() local
678 dpte_row_height = 1 << log2_dpte_row_height; in get_meta_and_pte_attr()
679 …dpte_row_width_ub = dml_round_to_multiple(data_pitch * dpte_row_height - 1, dpte_req_width, 1) + d… in get_meta_and_pte_attr()
699 rq_dlg_param->dpte_row_height = 1 << log2_dpte_row_height; in get_meta_and_pte_attr()
1223 dpte_row_height_l = rq_dlg_param->rq_l.dpte_row_height; in dml_rq_dlg_get_dlg_params()
1224 dpte_row_height_c = rq_dlg_param->rq_c.dpte_row_height; in dml_rq_dlg_get_dlg_params()
A Ddisplay_mode_vba_314.c231 unsigned int *dpte_row_height,
424 int dpte_row_height[],
1830 unsigned int *dpte_row_height,
1961 *dpte_row_height = *PixelPTEReqHeight;
2414 &v->dpte_row_height[k],
2454 v->dpte_row_height[k],
3042 v->dpte_row_height,
3654 v->dpte_row_height[k] * LineTime / v->VRatio[k],
4928 &v->dpte_row_height[k],
4967 v->dpte_row_height[k],
[all …]
/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
A Ddml2_core_dcn4_calcs.h34 void dml2_core_calcs_get_dpte_row_height(unsigned int *dpte_row_height, struct dml2_core_internal_d…
A Ddml2_core_shared_types.h460 unsigned int dpte_row_height[DML2_MAX_PLANES]; member
718 unsigned int dpte_row_height[DML2_MAX_PLANES]; member
1469 unsigned int *dpte_row_height; member
1649 unsigned int *dpte_row_height; member
A Ddml2_core_dcn4_calcs.c1640 *p->dpte_row_height = 0; in CalculateVMAndRowBytes()
1761 *p->dpte_row_height = *p->PixelPTEReqHeight; in CalculateVMAndRowBytes()
6470 unsigned int dpte_row_height, in CalculateFlipSchedule() argument
6519 l->min_row_height = math_min2(dpte_row_height, meta_row_height); in CalculateFlipSchedule()
6522 l->min_row_height = dpte_row_height; in CalculateFlipSchedule()
6533 l->min_row_height = dpte_row_height; in CalculateFlipSchedule()
7771 mode_lib->ms.dpte_row_height[k], in dml_core_ms_prefetch_check()
11502 mode_lib->mp.dpte_row_height[k], in dml_core_mode_programming()
11758 CalculateMetaAndPTETimes_params->dpte_row_height = mode_lib->mp.dpte_row_height; in dml_core_mode_programming()
12018 unsigned int *dpte_row_height, in dml2_core_calcs_get_dpte_row_height() argument
[all …]
/drivers/gpu/drm/amd/display/dc/dml/dcn32/
A Ddisplay_mode_vba_util_32.h464 unsigned int *dpte_row_height,
792 unsigned int dpte_row_height,
906 unsigned int dpte_row_height[],
A Ddisplay_mode_vba_util_32.c2292 unsigned int *dpte_row_height, in dml32_CalculateVMAndRowBytes()
2468 dml_print("DML::%s: dpte_row_height = %d\n", __func__, *dpte_row_height); in dml32_CalculateVMAndRowBytes()
2470 *dpte_row_width_ub = dml_ceil(((double) Pitch * (double) *dpte_row_height - 1), in dml32_CalculateVMAndRowBytes()
2481 *dpte_row_height = *PixelPTEReqHeight; in dml32_CalculateVMAndRowBytes()
2497 *dpte_row_height = dml_min(*PixelPTEReqWidth, MacroTileWidth); in dml32_CalculateVMAndRowBytes()
2517 dml_print("DML::%s: dpte_row_height = %d\n", __func__, *dpte_row_height); in dml32_CalculateVMAndRowBytes()
4136 unsigned int dpte_row_height, in dml32_CalculateFlipSchedule() argument
4215 min_row_time = dml_min(dpte_row_height * in dml32_CalculateFlipSchedule()
4227 min_row_time = dpte_row_height * LineTime / VRatio; in dml32_CalculateFlipSchedule()
4887 unsigned int dpte_row_height[], in dml32_CalculateMetaAndPTETimes() argument
[all …]
A Ddisplay_mode_vba_32.c489 v->dpte_row_height, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1057 v->dpte_row_height[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1303 v->dpte_row_height, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2782 mode_lib->vba.dpte_row_height, in dml32_ModeSupportAndSystemConfigurationFull()
3495 mode_lib->vba.dpte_row_height[k], in dml32_ModeSupportAndSystemConfigurationFull()
/drivers/gpu/drm/amd/display/dc/dml2/
A Ddisplay_mode_core.h38 dml_uint_t *dpte_row_height,
A Ddisplay_mode_core.c261 dml_uint_t *dpte_row_height,
330 dml_uint_t dpte_row_height,
510 dml_uint_t dpte_row_height[],
1968 dml_uint_t dpte_row_height, in CalculateFlipSchedule() argument
2477 dml_uint_t *dpte_row_height, in CalculateVMAndRowBytes()
2638 *dpte_row_height = *PixelPTEReqHeight; in CalculateVMAndRowBytes()
3437 dml_uint_t dpte_row_height[], in CalculateMetaAndPTETimes() argument
6562 mode_lib->ms.dpte_row_height[k], in dml_prefetch_check()
9270 locals->dpte_row_height[k], in dml_core_mode_programming()
9550 locals->dpte_row_height, in dml_core_mode_programming()
[all …]
A Ddisplay_mode_core_structs.h940 dml_uint_t dpte_row_height[__DML_NUM_PLANES__]; member
1063 dml_uint_t dpte_row_height[__DML_NUM_PLANES__]; member

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