Home
last modified time | relevance | path

Searched refs:dpu_hw_blk_reg_map (Results 1 – 25 of 29) sorted by relevance

12

/drivers/gpu/drm/msm/disp/dpu1/
A Ddpu_hw_util.h35 struct dpu_hw_blk_reg_map { struct
333 void dpu_reg_write(struct dpu_hw_blk_reg_map *c,
337 int dpu_reg_read(struct dpu_hw_blk_reg_map *c, u32 reg_off);
344 void dpu_hw_setup_scaler3(struct dpu_hw_blk_reg_map *c,
349 void dpu_hw_csc_setup(struct dpu_hw_blk_reg_map *c,
353 void dpu_setup_cdp(struct dpu_hw_blk_reg_map *c, u32 offset,
359 void _dpu_hw_setup_qos_lut(struct dpu_hw_blk_reg_map *c, u32 offset,
363 void dpu_hw_setup_misr(struct dpu_hw_blk_reg_map *c,
366 int dpu_hw_collect_misr(struct dpu_hw_blk_reg_map *c,
371 bool dpu_hw_clk_force_ctrl(struct dpu_hw_blk_reg_map *c,
A Ddpu_hw_vbif.c40 struct dpu_hw_blk_reg_map *c; in dpu_hw_clear_errors()
60 struct dpu_hw_blk_reg_map *c; in dpu_hw_set_mem_type()
90 struct dpu_hw_blk_reg_map *c = &vbif->hw; in dpu_hw_set_limit_conf()
111 struct dpu_hw_blk_reg_map *c = &vbif->hw; in dpu_hw_get_limit_conf()
133 struct dpu_hw_blk_reg_map *c = &vbif->hw; in dpu_hw_set_halt_ctrl()
149 struct dpu_hw_blk_reg_map *c = &vbif->hw; in dpu_hw_get_halt_ctrl()
160 struct dpu_hw_blk_reg_map *c; in dpu_hw_set_qos_remap()
189 struct dpu_hw_blk_reg_map *c; in dpu_hw_set_write_gather_en()
A Ddpu_hw_pingpong.c50 struct dpu_hw_blk_reg_map *c; in dpu_hw_pp_setup_dither()
81 struct dpu_hw_blk_reg_map *c; in dpu_hw_pp_enable_te()
135 struct dpu_hw_blk_reg_map *c; in dpu_hw_pp_disable_te()
148 struct dpu_hw_blk_reg_map *c = &pp->hw; in dpu_hw_pp_connect_external_te()
171 struct dpu_hw_blk_reg_map *c; in dpu_hw_pp_get_vsync_info()
193 struct dpu_hw_blk_reg_map *c = &pp->hw; in dpu_hw_pp_get_line_count()
262 struct dpu_hw_blk_reg_map *c = &pp->hw; in dpu_hw_pp_dsc_enable()
270 struct dpu_hw_blk_reg_map *c = &pp->hw; in dpu_hw_pp_dsc_disable()
277 struct dpu_hw_blk_reg_map *pp_c = &pp->hw; in dpu_hw_pp_setup_dsc()
A Ddpu_hw_lm.c69 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_lm_setup_out()
90 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_lm_setup_border_color()
106 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_lm_setup_border_color_v12()
131 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_lm_setup_blend_config_combined_alpha()
152 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_lm_setup_blend_config_combined_alpha_v12()
171 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_lm_setup_blend_config()
189 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_lm_setup_color3()
203 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_lm_setup_color3_v12()
283 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_lm_setup_blendstage()
321 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_lm_clear_all_blendstages()
A Ddpu_hw_intf.c103 struct dpu_hw_blk_reg_map *c = &intf->hw; in dpu_hw_intf_setup_timing_engine()
259 struct dpu_hw_blk_reg_map *c = &intf->hw; in dpu_hw_intf_enable_timing_engine()
268 struct dpu_hw_blk_reg_map *c = &intf->hw; in dpu_hw_intf_setup_prg_fetch()
292 struct dpu_hw_blk_reg_map *c = &intf->hw; in dpu_hw_intf_bind_pingpong_blk()
310 struct dpu_hw_blk_reg_map *c = &intf->hw; in dpu_hw_intf_get_status()
329 struct dpu_hw_blk_reg_map *c; in dpu_hw_intf_get_line_count()
352 struct dpu_hw_blk_reg_map *c; in dpu_hw_intf_enable_te()
385 struct dpu_hw_blk_reg_map *c; in dpu_hw_intf_setup_autorefresh_config()
417 struct dpu_hw_blk_reg_map *c; in dpu_hw_intf_disable_te()
430 struct dpu_hw_blk_reg_map *c = &intf->hw; in dpu_hw_intf_connect_external_te()
[all …]
A Ddpu_hw_util.c90 void dpu_reg_write(struct dpu_hw_blk_reg_map *c, in dpu_reg_write()
102 int dpu_reg_read(struct dpu_hw_blk_reg_map *c, u32 reg_off) in dpu_reg_read()
112 static void _dpu_hw_setup_scaler3_lut(struct dpu_hw_blk_reg_map *c, in _dpu_hw_setup_scaler3_lut()
238 static void _dpu_hw_setup_scaler3_de(struct dpu_hw_blk_reg_map *c, in _dpu_hw_setup_scaler3_de()
282 void dpu_hw_setup_scaler3(struct dpu_hw_blk_reg_map *c, in dpu_hw_setup_scaler3()
384 void dpu_hw_csc_setup(struct dpu_hw_blk_reg_map *c, in dpu_hw_csc_setup()
460 void _dpu_hw_setup_qos_lut(struct dpu_hw_blk_reg_map *c, u32 offset, in _dpu_hw_setup_qos_lut()
481 void dpu_hw_setup_misr(struct dpu_hw_blk_reg_map *c, in dpu_hw_setup_misr()
496 int dpu_hw_collect_misr(struct dpu_hw_blk_reg_map *c, in dpu_hw_collect_misr()
524 void dpu_setup_cdp(struct dpu_hw_blk_reg_map *c, u32 offset, in dpu_setup_cdp()
[all …]
A Ddpu_hw_top.c35 struct dpu_hw_blk_reg_map *c; in dpu_hw_setup_split_pipe()
86 struct dpu_hw_blk_reg_map *c; in dpu_hw_get_danger_status()
115 struct dpu_hw_blk_reg_map *c; in dpu_hw_setup_wd_timer()
171 struct dpu_hw_blk_reg_map *c; in dpu_hw_setup_vsync_sel()
198 struct dpu_hw_blk_reg_map *c; in dpu_hw_get_safe_status()
226 struct dpu_hw_blk_reg_map *c; in dpu_hw_intf_audio_select()
239 struct dpu_hw_blk_reg_map *c = &mdp->hw; in dpu_hw_dp_phy_intf_sel()
A Ddpu_hw_dsc.c40 struct dpu_hw_blk_reg_map *c = &dsc->hw; in dpu_hw_dsc_disable()
50 struct dpu_hw_blk_reg_map *c = &hw_dsc->hw; in dpu_hw_dsc_config()
132 struct dpu_hw_blk_reg_map *c = &hw_dsc->hw; in dpu_hw_dsc_config_thresh()
165 struct dpu_hw_blk_reg_map *c = &hw_dsc->hw; in dpu_hw_dsc_bind_pingpong_blk()
A Ddpu_hw_wb.c58 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_wb_setup_outaddress()
70 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_wb_setup_format()
128 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_wb_roi()
165 struct dpu_hw_blk_reg_map *c; in dpu_hw_wb_bind_pingpong_blk()
A Ddpu_hw_ctl.c89 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_ctl_get_flush_register()
411 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_ctl_poll_reset_status()
433 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_ctl_reset_control()
445 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_ctl_wait_reset_status()
464 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_ctl_clear_all_blendstages()
507 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_ctl_setup_blendstage()
570 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_ctl_intf_cfg_v1()
626 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_ctl_intf_cfg()
659 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_ctl_reset_intf_cfg_v1()
A Ddpu_hw_cdm.c76 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_cdm_setup_cdwn()
172 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_cdm_enable()
209 struct dpu_hw_blk_reg_map *c; in dpu_hw_cdm_bind_pingpong_blk()
A Ddpu_hw_dsc_1_2.c73 struct dpu_hw_blk_reg_map *hw; in dpu_hw_dsc_disable_1_2()
92 struct dpu_hw_blk_reg_map *hw; in dpu_hw_dsc_config_1_2()
244 struct dpu_hw_blk_reg_map *hw; in dpu_hw_dsc_config_thresh_1_2()
349 struct dpu_hw_blk_reg_map *hw; in dpu_hw_dsc_bind_pingpong_blk_1_2()
A Ddpu_hw_merge3d.h28 struct dpu_hw_blk_reg_map hw;
A Ddpu_hw_cwb.h49 struct dpu_hw_blk_reg_map hw;
A Ddpu_hw_dspp.h61 struct dpu_hw_blk_reg_map hw;
A Ddpu_hw_interrupts.h61 struct dpu_hw_blk_reg_map hw;
A Ddpu_hw_wb.h68 struct dpu_hw_blk_reg_map hw;
A Ddpu_hw_merge3d.c22 struct dpu_hw_blk_reg_map *c; in dpu_hw_merge_3d_setup_3d_mode()
A Ddpu_hw_vbif.h98 struct dpu_hw_blk_reg_map hw;
A Ddpu_hw_dsc.h55 struct dpu_hw_blk_reg_map hw;
A Ddpu_hw_cdm.h115 struct dpu_hw_blk_reg_map hw;
A Ddpu_hw_cwb.c21 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_cwb_config()
A Ddpu_hw_pingpong.h100 struct dpu_hw_blk_reg_map hw;
A Ddpu_hw_lm.h89 struct dpu_hw_blk_reg_map hw;
A Ddpu_hw_top.h151 struct dpu_hw_blk_reg_map hw;

Completed in 46 milliseconds

12