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Searched refs:dram_clock_change_latency_100ns (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dml/dcn302/
A Ddcn302_fpu.c354 if (bb_info.dram_clock_change_latency_100ns > 0) in dcn302_fpu_init_soc_bounding_box()
356 bb_info.dram_clock_change_latency_100ns * 10; in dcn302_fpu_init_soc_bounding_box()
/drivers/gpu/drm/amd/display/dc/dml/dcn303/
A Ddcn303_fpu.c372 if (bb_info.dram_clock_change_latency_100ns > 0) in dcn303_fpu_init_soc_bounding_box()
373 dcn3_03_soc.dram_clock_change_latency_us = bb_info.dram_clock_change_latency_100ns * 10; in dcn303_fpu_init_soc_bounding_box()
/drivers/gpu/drm/amd/display/dc/dml/dcn301/
A Ddcn301_fpu.c402 if (bb_info.dram_clock_change_latency_100ns > 0) in dcn301_fpu_init_soc_bounding_box()
403 dcn3_01_soc.dram_clock_change_latency_us = bb_info.dram_clock_change_latency_100ns * 10; in dcn301_fpu_init_soc_bounding_box()
/drivers/gpu/drm/amd/display/include/
A Dbios_parser_types.h333 uint32_t dram_clock_change_latency_100ns; member
/drivers/gpu/drm/amd/display/dc/dml/dcn30/
A Ddcn30_fpu.c729 if (bb_info.dram_clock_change_latency_100ns > 0) in patch_dcn30_soc_bounding_box()
730 dcn3_0_soc.dram_clock_change_latency_us = bb_info.dram_clock_change_latency_100ns * 10; in patch_dcn30_soc_bounding_box()
/drivers/gpu/drm/amd/display/dc/dml/dcn321/
A Ddcn321_fpu.c666 if (bb_info.dram_clock_change_latency_100ns > 0) in dcn321_update_bw_bounding_box_fpu()
669 bb_info.dram_clock_change_latency_100ns * 10; in dcn321_update_bw_bounding_box_fpu()
/drivers/gpu/drm/amd/display/dc/dml2/dml21/
A Ddml21_translation_helper.c270 if (in_dc->ctx->dc_bios->bb_info.dram_clock_change_latency_100ns > 0) in override_dml_init_with_values_from_vbios()
272 (in_dc->ctx->dc_bios->bb_info.dram_clock_change_latency_100ns + 9) / 10; in override_dml_init_with_values_from_vbios()
/drivers/gpu/drm/amd/display/dc/bios/
A Dbios_parser2.c1132 soc_bb_info->dram_clock_change_latency_100ns = disp_cntl_tbl->max_mclk_chg_lat; in get_soc_bb_info_v4_4()
1157 soc_bb_info->dram_clock_change_latency_100ns = disp_cntl_tbl->max_mclk_chg_lat; in get_soc_bb_info_v4_5()
/drivers/gpu/drm/amd/display/dc/dml/dcn32/
A Ddcn32_fpu.c3108 if (bb_info.dram_clock_change_latency_100ns > 0) in dcn32_update_bw_bounding_box_fpu()
3111 bb_info.dram_clock_change_latency_100ns * 10; in dcn32_update_bw_bounding_box_fpu()

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