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Searched refs:drm_mode (Results 1 – 13 of 13) sorted by relevance

/drivers/gpu/drm/msm/dp/
A Ddp_panel.c550 drm_mode->hdisplay, drm_mode->htotal - drm_mode->hsync_end, in msm_dp_panel_timing_cfg()
551 drm_mode->hsync_start - drm_mode->hdisplay, in msm_dp_panel_timing_cfg()
552 drm_mode->hsync_end - drm_mode->hsync_start); in msm_dp_panel_timing_cfg()
555 drm_mode->vdisplay, drm_mode->vtotal - drm_mode->vsync_end, in msm_dp_panel_timing_cfg()
556 drm_mode->vsync_start - drm_mode->vdisplay, in msm_dp_panel_timing_cfg()
557 drm_mode->vsync_end - drm_mode->vsync_start); in msm_dp_panel_timing_cfg()
627 drm_mode->hdisplay, drm_mode->vdisplay, drm_mode_vrefresh(drm_mode)); in msm_dp_panel_init_panel_info()
630 drm_mode->htotal - drm_mode->hsync_end, in msm_dp_panel_init_panel_info()
631 drm_mode->hsync_start - drm_mode->hdisplay, in msm_dp_panel_init_panel_info()
635 drm_mode->vtotal - drm_mode->vsync_end, in msm_dp_panel_init_panel_info()
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A Ddp_debug.c37 drm_mode = &debug->panel->msm_dp_mode.drm_mode; in msm_dp_debug_show()
47 drm_mode->hdisplay, in msm_dp_debug_show()
48 drm_mode->vdisplay); in msm_dp_debug_show()
50 drm_mode->htotal - drm_mode->hsync_end, in msm_dp_debug_show()
51 drm_mode->vtotal - drm_mode->vsync_end); in msm_dp_debug_show()
53 drm_mode->hsync_start - drm_mode->hdisplay, in msm_dp_debug_show()
54 drm_mode->vsync_start - drm_mode->vdisplay); in msm_dp_debug_show()
56 drm_mode->hsync_end - drm_mode->hsync_start, in msm_dp_debug_show()
57 drm_mode->vsync_end - drm_mode->vsync_start); in msm_dp_debug_show()
62 drm_mode->hskew); in msm_dp_debug_show()
[all …]
A Ddp_panel.h18 struct drm_display_mode drm_mode; member
A Ddp_ctrl.c1235 struct drm_display_mode *drm_mode; in msm_dp_ctrl_calc_tu_parameters() local
1237 drm_mode = &ctrl->panel->msm_dp_mode.drm_mode; in msm_dp_ctrl_calc_tu_parameters()
1240 in.pclk_khz = drm_mode->clock; in msm_dp_ctrl_calc_tu_parameters()
1241 in.hactive = drm_mode->hdisplay; in msm_dp_ctrl_calc_tu_parameters()
1242 in.hporch = drm_mode->htotal - drm_mode->hdisplay; in msm_dp_ctrl_calc_tu_parameters()
2172 pixel_rate = ctrl->panel->msm_dp_mode.drm_mode.clock; in msm_dp_ctrl_process_phy_test_request()
2278 pixel_rate = ctrl->panel->msm_dp_mode.drm_mode.clock; in msm_dp_ctrl_on_link()
2462 pixel_rate = pixel_rate_orig = ctrl->panel->msm_dp_mode.drm_mode.clock; in msm_dp_ctrl_on_stream()
A Ddp_display.c828 drm_mode_copy(&dp->panel->msm_dp_mode.drm_mode, &mode->drm_mode); in msm_dp_display_set_mode()
1594 if (!msm_dp_display->msm_dp_mode.drm_mode.clock) { in msm_dp_bridge_atomic_enable()
1714 drm_mode_copy(&msm_dp_display->msm_dp_mode.drm_mode, adjusted_mode); in msm_dp_bridge_mode_set()
1717 !!(msm_dp_display->msm_dp_mode.drm_mode.flags & DRM_MODE_FLAG_NVSYNC); in msm_dp_bridge_mode_set()
1720 !!(msm_dp_display->msm_dp_mode.drm_mode.flags & DRM_MODE_FLAG_NHSYNC); in msm_dp_bridge_mode_set()
/drivers/gpu/drm/
A Ddrm_modes.c651 if (!drm_mode) in drm_cvt_mode()
760 drm_mode->htotal = drm_mode->hdisplay + hblank; in drm_cvt_mode()
761 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2; in drm_cvt_mode()
762 drm_mode->hsync_start = drm_mode->hsync_end - in drm_cvt_mode()
768 drm_mode->vsync_end = drm_mode->vsync_start + vsync; in drm_cvt_mode()
794 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK; in drm_cvt_mode()
797 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC; in drm_cvt_mode()
800 drm_mode->vsync_end = drm_mode->vsync_start + vsync; in drm_cvt_mode()
886 if (!drm_mode) in drm_gtf_mode_complex()
995 drm_mode->hsync_end = drm_mode->hsync_start + hsync; in drm_gtf_mode_complex()
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/drivers/gpu/drm/panel/
A Dpanel-samsung-s6d7aa0.c39 const struct drm_display_mode *drm_mode; member
246 .drm_mode = &s6d7aa0_lsl080al02_mode,
321 .drm_mode = &s6d7aa0_lsl080al03_mode,
349 .drm_mode = &s6d7aa0_ltl101at01_mode,
367 mode = drm_mode_duplicate(connector->dev, ctx->desc->drm_mode); in s6d7aa0_get_modes()
/drivers/gpu/drm/nouveau/dispnv04/i2c/
A Dch7006_mode.c174 const struct drm_display_mode *drm_mode) in ch7006_lookup_mode() argument
184 if (mode->mode.hdisplay != drm_mode->hdisplay || in ch7006_lookup_mode()
185 mode->mode.vdisplay != drm_mode->vdisplay || in ch7006_lookup_mode()
186 mode->mode.vtotal != drm_mode->vtotal || in ch7006_lookup_mode()
187 mode->mode.htotal != drm_mode->htotal || in ch7006_lookup_mode()
188 mode->mode.clock != drm_mode->clock) in ch7006_lookup_mode()
A Dch7006_drv.c116 struct drm_display_mode *drm_mode, in ch7006_encoder_mode_set() argument
143 start_active = (drm_mode->htotal & ~0x7) - (drm_mode->hsync_start & ~0x7); in ch7006_encoder_mode_set()
152 if (drm_mode->flags & DRM_MODE_FLAG_PVSYNC) in ch7006_encoder_mode_set()
154 if (drm_mode->flags & DRM_MODE_FLAG_PHSYNC) in ch7006_encoder_mode_set()
A Dch7006_priv.h114 const struct drm_display_mode *drm_mode);
/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm.h1051 const struct drm_display_mode *drm_mode,
A Damdgpu_dm.c6513 native_mode->clock == drm_mode->clock && in decide_crtc_timing_for_drm_display_mode()
6514 native_mode->htotal == drm_mode->htotal && in decide_crtc_timing_for_drm_display_mode()
6515 native_mode->vtotal == drm_mode->vtotal)) { in decide_crtc_timing_for_drm_display_mode()
6885 const struct drm_display_mode *drm_mode, in create_stream_for_sink() argument
6910 drm_mode_init(&mode, drm_mode); in create_stream_for_sink()
7596 const struct drm_display_mode *drm_mode, in create_validate_stream_for_sink() argument
7620 stream = create_stream_for_sink(connector, drm_mode, in create_validate_stream_for_sink()
7641 drm_mode->hdisplay, in create_validate_stream_for_sink()
7642 drm_mode->vdisplay, in create_validate_stream_for_sink()
7643 drm_mode->clock, in create_validate_stream_for_sink()
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/drivers/gpu/drm/nouveau/dispnv04/
A Dtvnv17.c465 struct drm_display_mode *drm_mode, in nv17_tv_mode_set() argument

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