Searched refs:dsc_caps (Results 1 – 12 of 12) sorted by relevance
| /drivers/gpu/drm/amd/display/amdgpu_dm/ |
| A D | amdgpu_dm_mst_types.c | 271 u8 dsc_caps[16] = { 0 }; in validate_dsc_caps_on_connector() local
305 dsc_caps, dsc_branch_dec_caps, in validate_dsc_caps_on_connector()
306 &dc_sink->dsc_caps.dsc_dec_caps)) in validate_dsc_caps_on_connector()
452 memset(&aconnector->dc_sink->dsc_caps, in dm_dp_mst_get_modes()
887 ¶ms[i].sink->dsc_caps.dsc_dec_caps, in set_dsc_configs_from_fairness_vars()
940 ¶m.sink->dsc_caps.dsc_dec_caps, in bpp_x16_from_pbn()
1212 &stream->sink->dsc_caps.dsc_dec_caps, in compute_mst_dsc_configs_for_link()
1583 union dpcd_dsc_basic_capabilities *dsc_caps = in is_link_to_dschub() local
1584 &dc_link->dpcd_caps.dsc_caps.dsc_basic_caps; in is_link_to_dschub()
1749 &stream->sink->dsc_caps.dsc_dec_caps, in is_dsc_common_config_possible()
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| A D | amdgpu_dm.c | 6724 struct dsc_dec_dpcd_caps *dsc_caps) in update_dsc_caps() argument
6727 dsc_caps->is_dsc_supported = false; in update_dsc_caps()
6736 dsc_caps); in update_dsc_caps()
6742 struct dsc_dec_dpcd_caps *dsc_caps, in apply_dsc_policy_for_edp() argument
6770 dsc_caps, in apply_dsc_policy_for_edp()
6777 dsc_caps, in apply_dsc_policy_for_edp()
6792 dsc_caps, in apply_dsc_policy_for_edp()
6805 struct dsc_dec_dpcd_caps *dsc_caps) in apply_dsc_policy_for_stream() argument
6835 dsc_caps, in apply_dsc_policy_for_stream()
6855 dsc_caps, in apply_dsc_policy_for_stream()
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| A D | amdgpu_dm_debugfs.c | 1403 is_dsc_supported = dpcd_caps.dsc_caps.dsc_basic_caps.raw[0] & 0x1; in dp_dsc_fec_support_show()
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| /drivers/gpu/drm/amd/display/dc/link/protocols/ |
| A D | link_dp_capability.c | 367 && (link->dpcd_caps.dsc_caps.dsc_basic_caps.fields. in dp_should_enable_fec()
1944 memset(&link->dpcd_caps.dsc_caps, '\0', in retrieve_link_cap()
1945 sizeof(link->dpcd_caps.dsc_caps)); in retrieve_link_cap()
1960 link->dpcd_caps.dsc_caps.dsc_basic_caps.raw, in retrieve_link_cap()
1961 sizeof(link->dpcd_caps.dsc_caps.dsc_basic_caps.raw)); in retrieve_link_cap()
1977 link->dpcd_caps.dsc_caps.dsc_branch_decoder_caps.raw, in retrieve_link_cap()
1978 sizeof(link->dpcd_caps.dsc_caps.dsc_branch_decoder_caps.raw)); in retrieve_link_cap()
1984 link->dpcd_caps.dsc_caps.dsc_branch_decoder_caps.fields.BRANCH_OVERALL_THROUGHPUT_0); in retrieve_link_cap()
1988 link->dpcd_caps.dsc_caps.dsc_branch_decoder_caps.fields.BRANCH_MAX_LINE_WIDTH); in retrieve_link_cap()
2000 link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT)) { in retrieve_link_cap()
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| /drivers/gpu/drm/amd/display/dc/dsc/ |
| A D | dc_dsc.c | 164 const struct dsc_enc_caps *dsc_caps,
801 const struct dsc_enc_caps *dsc_caps, in decide_dsc_bandwidth_range() argument
819 else if (dsc_caps->edp_sink_max_bits_per_pixel) { in decide_dsc_bandwidth_range()
821 range->max_target_bpp_x16 = MIN(dsc_caps->edp_sink_max_bits_per_pixel, in decide_dsc_bandwidth_range()
837 range->max_target_bpp_x16, num_slices_h, dsc_caps->is_dp); in decide_dsc_bandwidth_range()
841 range->min_target_bpp_x16, num_slices_h, dsc_caps->is_dp); in decide_dsc_bandwidth_range()
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| /drivers/gpu/drm/amd/display/dc/link/ |
| A D | link_validation.c | 149 dpcd_caps->dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_PASSTHROUGH_SUPPORT == 0 && in dp_active_dongle_validate_timing()
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| A D | link_detection.c | 697 link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT && in apply_dpia_mst_dsc_always_on_wa()
705 link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT && in apply_dpia_mst_dsc_always_on_wa()
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dmub_psr.c | 398 (link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT && in dmub_psr_copy_settings()
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| A D | dmub_replay.c | 216 (link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT && in dmub_replay_copy_settings()
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| /drivers/gpu/drm/amd/display/modules/power/ |
| A D | power_helpers.c | 838 else if (dpcd_caps->dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT && in is_psr_su_specific_panel()
954 !link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT || in psr_su_set_dsc_slice_height()
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| /drivers/gpu/drm/amd/display/dc/ |
| A D | dc_dp_types.h | 1264 struct dpcd_dsc_capabilities dsc_caps; member
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| A D | dc.h | 2505 struct dc_sink_dsc_caps dsc_caps; member
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