| /drivers/gpu/drm/amd/display/dc/dsc/ |
| A D | dsc.h | 107 void (*dsc_enable)(struct display_stream_compressor *dsc, int opp_pipe); member
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| /drivers/gpu/drm/amd/display/dc/dsc/dcn35/ |
| A D | dcn35_dsc.c | 38 .dsc_enable = dsc35_enable,
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| /drivers/gpu/drm/i915/display/ |
| A D | intel_display_debugfs.c | 963 bool dsc_enable = false; in i915_dsc_fec_support_write() local
972 ret = kstrtobool_from_user(ubuf, len, &dsc_enable); in i915_dsc_fec_support_write()
977 str_true_false(dsc_enable)); in i915_dsc_fec_support_write()
978 intel_dp->force_dsc_en = dsc_enable; in i915_dsc_fec_support_write()
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| /drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/ |
| A D | dml2_pmo_dcn3.c | 410 if (mode_support_result->cfg_support_info.stream_support_info[stream_index].dsc_enable) { in pmo_dcn3_optimize_for_vmin()
429 if (mode_support_result->cfg_support_info.stream_support_info[stream_index].dsc_enable) { in pmo_dcn3_optimize_for_vmin()
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| A D | dml2_pmo_dcn4_fams2.c | 876 if (mode_support_result->cfg_support_info.stream_support_info[stream_index].dsc_enable) { in pmo_dcn4_fams2_optimize_for_vmin()
895 if (mode_support_result->cfg_support_info.stream_support_info[stream_index].dsc_enable) { in pmo_dcn4_fams2_optimize_for_vmin()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn314/ |
| A D | dcn314_hwseq.c | 113 dsc->funcs->dsc_enable(dsc, pipe_ctx->stream_res.opp->inst); in update_dsc_on_stream()
119 odm_dsc->funcs->dsc_enable(odm_dsc, odm_pipe->stream_res.opp->inst); in update_dsc_on_stream()
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| /drivers/gpu/drm/amd/display/dc/dml/ |
| A D | display_mode_lib.c | 270 dml_print("DML PARAMS: dsc_enable = %d\n", dout->dsc_enable); in dml_log_pipe_params()
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| A D | display_mode_structs.h | 471 int dsc_enable; member
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| A D | display_mode_vba.c | 634 if (dout->dsc_enable) in fetch_pipe_params()
647 mode_lib->vba.DSCEnabled[mode_lib->vba.NumberOfActivePlanes] = dout->dsc_enable; in fetch_pipe_params()
648 mode_lib->vba.DSCEnable[mode_lib->vba.NumberOfActivePlanes] = dout->dsc_enable; in fetch_pipe_params()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| A D | dcn314_fpu.c | 373 if (pipes[pipe_cnt].dout.dsc_enable) { in dcn314_populate_dml_pipes_from_context_fpu()
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| /drivers/gpu/drm/amd/display/dc/dsc/dcn401/ |
| A D | dcn401_dsc.c | 24 .dsc_enable = dsc401_enable,
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| /drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/ |
| A D | dml2_internal_shared_types.h | 170 bool dsc_enable; member
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| /drivers/gpu/drm/amd/display/dc/dml/dcn351/ |
| A D | dcn351_fpu.c | 543 if (pipes[pipe_cnt].dout.dsc_enable) { in dcn351_populate_dml_pipes_from_context_fpu()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn35/ |
| A D | dcn35_fpu.c | 510 if (pipes[pipe_cnt].dout.dsc_enable) { in dcn35_populate_dml_pipes_from_context_fpu()
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| /drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| A D | dml2_core_shared_types.h | 804 bool dsc_enable[DML2_MAX_PLANES]; member
1228 bool dsc_enable[DML2_MAX_PLANES]; member
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| A D | dml2_core_dcn4.c | 517 …in_out->mode_support_result.cfg_support_info.stream_support_info[stream_index].dsc_enable = l->mod… in core_dcn4_mode_support()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| A D | dcn35_hwseq.c | 359 dsc->funcs->dsc_enable(dsc, pipe_ctx->stream_res.opp->inst); in update_dsc_on_stream()
365 odm_dsc->funcs->dsc_enable(odm_dsc, odm_pipe->stream_res.opp->inst); in update_dsc_on_stream()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| A D | dcn32_hwseq.c | 1068 dsc->funcs->dsc_enable(dsc, pipe_ctx->stream_res.opp->inst); in dcn32_update_dsc_on_stream()
1078 odm_dsc->funcs->dsc_enable(odm_dsc, odm_pipe->stream_res.opp->inst); in dcn32_update_dsc_on_stream()
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| /drivers/gpu/drm/amd/display/dc/dsc/dcn20/ |
| A D | dcn20_dsc.c | 41 .dsc_enable = dsc2_enable,
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| /drivers/gpu/drm/amd/display/dc/link/ |
| A D | link_dpms.c | 848 dsc->funcs->dsc_enable(dsc, pipe_ctx->stream_res.opp->inst); in link_set_dsc_on_stream()
855 odm_dsc->funcs->dsc_enable(odm_dsc, odm_pipe->stream_res.opp->inst); in link_set_dsc_on_stream()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| A D | display_rq_dlg_calc_20.c | 1017 if (dout->dsc_enable) { in dml20_rq_dlg_get_dlg_params()
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| A D | display_rq_dlg_calc_20v2.c | 1018 if (dout->dsc_enable) { in dml20v2_rq_dlg_get_dlg_params()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| A D | display_rq_dlg_calc_21.c | 1057 if (dout->dsc_enable) { in dml_rq_dlg_get_dlg_params()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| A D | display_rq_dlg_calc_30.c | 1118 if (dout->dsc_enable) { in dml_rq_dlg_get_dlg_params()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn316/ |
| A D | dcn316_resource.c | 1647 if (pipes[pipe_cnt].dout.dsc_enable) { in dcn316_populate_dml_pipes_from_context()
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