| /drivers/gpu/drm/amd/display/dc/pg/dcn35/ |
| A D | dcn35_pg_cntl.c | 47 static bool pg_cntl35_dsc_pg_status(struct pg_cntl *pg_cntl, unsigned int dsc_inst) in pg_cntl35_dsc_pg_status() argument
55 switch (dsc_inst) { in pg_cntl35_dsc_pg_status()
76 void pg_cntl35_dsc_pg_control(struct pg_cntl *pg_cntl, unsigned int dsc_inst, bool power_on) in pg_cntl35_dsc_pg_control() argument
87 pg_cntl->ctx->dc->res_pool->dccg, dsc_inst); in pg_cntl35_dsc_pg_control()
94 block_enabled = pg_cntl35_dsc_pg_status(pg_cntl, dsc_inst); in pg_cntl35_dsc_pg_control()
107 switch (dsc_inst) { in pg_cntl35_dsc_pg_control()
145 if (dsc_inst < MAX_PIPES) in pg_cntl35_dsc_pg_control()
146 pg_cntl->pg_pipe_res_enable[PG_DSC][dsc_inst] = power_on; in pg_cntl35_dsc_pg_control()
151 pg_cntl->ctx->dc->res_pool->dccg, dsc_inst); in pg_cntl35_dsc_pg_control()
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| A D | dcn35_pg_cntl.h | 172 void pg_cntl35_dsc_pg_control(struct pg_cntl *pg_cntl, unsigned int dsc_inst, bool power_on);
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| A D | dcn35_hwseq.h | 36 void dcn35_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on);
88 unsigned int dsc_inst,
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| A D | dcn35_hwseq.c | 505 unsigned int dsc_inst, in dcn35_dsc_pg_control() argument
520 switch (dsc_inst) { in dcn35_dsc_pg_control()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| A D | dcn32_hwseq.h | 35 unsigned int dsc_inst,
108 unsigned int dsc_inst);
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| A D | dcn32_hwseq.c | 71 unsigned int dsc_inst, in dcn32_dsc_pg_control() argument
89 DC_LOG_DSC("%s DSC power gate for inst %d", power_gate ? "enable" : "disable", dsc_inst); in dcn32_dsc_pg_control()
90 switch (dsc_inst) { in dcn32_dsc_pg_control()
1481 unsigned int dsc_inst) in dcn32_dsc_pg_status() argument
1485 switch (dsc_inst) { in dcn32_dsc_pg_status()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn302/ |
| A D | dcn302_hwseq.c | 159 void dcn302_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on) in dcn302_dsc_pg_control() argument
175 switch (dsc_inst) { in dcn302_dsc_pg_control()
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| A D | dcn302_hwseq.h | 33 void dcn302_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on);
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| /drivers/gpu/drm/amd/display/dc/inc/hw/ |
| A D | dccg.h | 214 void (*set_dto_dscclk)(struct dccg *dccg, uint32_t dsc_inst, uint32_t num_slices_h);
215 void (*set_ref_dscclk)(struct dccg *dccg, uint32_t dsc_inst);
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| A D | pg_cntl.h | 40 void (*dsc_pg_control)(struct pg_cntl *pg_cntl, unsigned int dsc_inst, bool power_on);
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| /drivers/gpu/drm/amd/display/dc/hwss/ |
| A D | hw_sequencer_private.h | 137 unsigned int dsc_inst,
140 unsigned int dsc_inst);
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn303/ |
| A D | dcn303_hwseq.h | 34 void dcn303_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on);
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| A D | dcn303_hwseq.c | 56 void dcn303_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on) in dcn303_dsc_pg_control() argument
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn314/ |
| A D | dcn314_hwseq.c | 226 unsigned int dsc_inst, in dcn314_dsc_pg_control() argument
240 hws->ctx->dc->res_pool->dccg, dsc_inst); in dcn314_dsc_pg_control()
246 switch (dsc_inst) { in dcn314_dsc_pg_control()
290 hws->ctx->dc->res_pool->dccg, dsc_inst); in dcn314_dsc_pg_control()
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| A D | dcn314_hwseq.h | 36 void dcn314_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on);
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn31/ |
| A D | dcn31_hwseq.h | 37 unsigned int dsc_inst,
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| A D | dcn31_hwseq.c | 283 unsigned int dsc_inst, in dcn31_dsc_pg_control() argument
297 hws->ctx->dc->res_pool->dccg, dsc_inst); in dcn31_dsc_pg_control()
303 switch (dsc_inst) { in dcn31_dsc_pg_control()
339 hws->ctx->dc->res_pool->dccg, dsc_inst); in dcn31_dsc_pg_control()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| A D | dcn20_hwseq.h | 135 unsigned int dsc_inst,
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| A D | dcn20_hwseq.c | 476 unsigned int dsc_inst, in dcn20_dsc_pg_control() argument
493 switch (dsc_inst) { in dcn20_dsc_pg_control()
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| /drivers/gpu/drm/amd/display/dc/dccg/dcn401/ |
| A D | dcn401_dccg.c | 767 uint32_t dsc_inst) in dccg401_set_ref_dscclk() argument
771 switch (dsc_inst) { in dccg401_set_ref_dscclk()
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| A D | dcn401_dccg.h | 214 uint32_t dsc_inst);
|