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Searched refs:dst_fmt (Results 1 – 25 of 35) sorted by relevance

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/drivers/media/platform/chips-media/wave5/
A Dwave5-vpu-dec.c330 wave5_update_pix_fmt(&inst->dst_fmt, in handle_dynamic_resolution_change()
400 if (inst->dst_fmt.num_planes == 1) { in wave5_vpu_dec_finish_decode()
522 width = inst->dst_fmt.width; in wave5_vpu_dec_try_fmt_cap()
523 height = inst->dst_fmt.height; in wave5_vpu_dec_try_fmt_cap()
534 width = inst->dst_fmt.width; in wave5_vpu_dec_try_fmt_cap()
535 height = inst->dst_fmt.height; in wave5_vpu_dec_try_fmt_cap()
741 s->r.width = inst->dst_fmt.width; in wave5_vpu_dec_g_selection()
742 s->r.height = inst->dst_fmt.height; in wave5_vpu_dec_g_selection()
777 s->r.width = inst->dst_fmt.width; in wave5_vpu_dec_s_selection()
778 s->r.height = inst->dst_fmt.height; in wave5_vpu_dec_s_selection()
[all …]
A Dwave5-vpu-enc.c149 luma_size = stride * inst->dst_fmt.height; in start_encode()
391 width = inst->dst_fmt.width; in wave5_vpu_enc_try_fmt_cap()
392 height = inst->dst_fmt.height; in wave5_vpu_enc_try_fmt_cap()
432 inst->dst_fmt.width = f->fmt.pix_mp.width; in wave5_vpu_enc_s_fmt_cap()
435 inst->dst_fmt.field = f->fmt.pix_mp.field; in wave5_vpu_enc_s_fmt_cap()
436 inst->dst_fmt.flags = f->fmt.pix_mp.flags; in wave5_vpu_enc_s_fmt_cap()
451 f->fmt.pix_mp.width = inst->dst_fmt.width; in wave5_vpu_enc_g_fmt_cap()
454 f->fmt.pix_mp.field = inst->dst_fmt.field; in wave5_vpu_enc_g_fmt_cap()
455 f->fmt.pix_mp.flags = inst->dst_fmt.flags; in wave5_vpu_enc_g_fmt_cap()
590 s->r.width = inst->dst_fmt.width; in wave5_vpu_enc_g_selection()
[all …]
/drivers/media/platform/verisilicon/
A Dhantro_postproc.c100 HANTRO_PP_REG_WRITE(vpu, input_width, MB_WIDTH(ctx->dst_fmt.width)); in hantro_postproc_g1_enable()
101 HANTRO_PP_REG_WRITE(vpu, input_height, MB_HEIGHT(ctx->dst_fmt.height)); in hantro_postproc_g1_enable()
104 HANTRO_PP_REG_WRITE(vpu, output_width, ctx->dst_fmt.width); in hantro_postproc_g1_enable()
105 HANTRO_PP_REG_WRITE(vpu, output_height, ctx->dst_fmt.height); in hantro_postproc_g1_enable()
106 HANTRO_PP_REG_WRITE(vpu, orig_width, MB_WIDTH(ctx->dst_fmt.width)); in hantro_postproc_g1_enable()
107 HANTRO_PP_REG_WRITE(vpu, display_width, ctx->dst_fmt.width); in hantro_postproc_g1_enable()
114 if (ctx->src_fmt.width <= ctx->dst_fmt.width) in down_scale_factor()
117 return DIV_ROUND_CLOSEST(ctx->src_fmt.width, ctx->dst_fmt.width); in down_scale_factor()
131 chroma_offset = ctx->dst_fmt.plane_fmt[0].bytesperline * in hantro_postproc_g2_enable()
132 ctx->dst_fmt.height; in hantro_postproc_g2_enable()
[all …]
A Dhantro_v4l2.c317 *pix_mp = ctx->dst_fmt; in vidioc_g_fmt_cap_mplane()
455 encoded_fmt = &ctx->dst_fmt; in hantro_reset_raw_fmt()
576 ctx->dst_fmt.ycbcr_enc = pix_mp->ycbcr_enc; in hantro_set_fmt_out()
577 ctx->dst_fmt.xfer_func = pix_mp->xfer_func; in hantro_set_fmt_out()
616 ctx->dst_fmt = *pix_mp; in hantro_set_fmt_cap()
681 sel->r.width = ctx->dst_fmt.width; in vidioc_g_selection()
682 sel->r.height = ctx->dst_fmt.height; in vidioc_g_selection()
728 ctx->dst_fmt.width = rect->width; in vidioc_s_selection()
729 ctx->dst_fmt.height = rect->height; in vidioc_s_selection()
815 pixfmt = &ctx->dst_fmt; in hantro_queue_setup()
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A Dhantro_h1_jpeg_enc.c30 overfill_r = ctx->src_fmt.width - ctx->dst_fmt.width; in hantro_h1_set_src_img_ctrl()
31 overfill_b = ctx->src_fmt.height - ctx->dst_fmt.height; in hantro_h1_set_src_img_ctrl()
120 jpeg_ctx.width = ctx->dst_fmt.width; in hantro_h1_jpeg_enc_run()
121 jpeg_ctx.height = ctx->dst_fmt.height; in hantro_h1_jpeg_enc_run()
A Drockchip_vpu2_hw_jpeg_enc.c47 overfill_r = ctx->src_fmt.width - ctx->dst_fmt.width; in rockchip_vpu2_set_src_img_ctrl()
48 overfill_b = ctx->src_fmt.height - ctx->dst_fmt.height; in rockchip_vpu2_set_src_img_ctrl()
149 jpeg_ctx.width = ctx->dst_fmt.width; in rockchip_vpu2_jpeg_enc_run()
150 jpeg_ctx.height = ctx->dst_fmt.height; in rockchip_vpu2_jpeg_enc_run()
A Dhantro_g2.c86 hantro_hevc_luma_compressed_size(ctx->dst_fmt.width, ctx->dst_fmt.height); in hantro_g2_chroma_compress_offset()
A Dhantro_g1_mpeg2_dec.c118 addr += ALIGN(ctx->dst_fmt.width, 16); in hantro_g1_mpeg2_dec_set_buffers()
196 reg = G1_REG_PIC_MB_WIDTH(MB_WIDTH(ctx->dst_fmt.width)) | in hantro_g1_mpeg2_dec_run()
197 G1_REG_PIC_MB_HEIGHT_P(MB_HEIGHT(ctx->dst_fmt.height)) | in hantro_g1_mpeg2_dec_run()
A Drockchip_vpu2_hw_mpeg2_dec.c121 addr += ALIGN(ctx->dst_fmt.width, 16); in rockchip_vpu2_mpeg2_dec_set_buffers()
213 reg = VDPU_REG_PIC_MB_WIDTH(MB_WIDTH(ctx->dst_fmt.width)) | in rockchip_vpu2_mpeg2_dec_run()
214 VDPU_REG_PIC_MB_HEIGHT_P(MB_HEIGHT(ctx->dst_fmt.height)) | in rockchip_vpu2_mpeg2_dec_run()
A Dhantro_vp8.c154 mb_width = DIV_ROUND_UP(ctx->dst_fmt.width, 16); in hantro_vp8_dec_init()
155 mb_height = DIV_ROUND_UP(ctx->dst_fmt.height, 16); in hantro_vp8_dec_init()
A Dhantro_hevc.c164 if (ctx->dst_fmt.width != in hantro_hevc_validate_sps()
168 if (ctx->dst_fmt.height != in hantro_hevc_validate_sps()
/drivers/media/platform/sunxi/sun8i-rotate/
A Dsun8i_rotate.c117 ctx->dst_fmt.bytesperline, ctx->dst_fmt.height, in rotate_device_run()
121 ROTATE_SIZE(ctx->dst_fmt.width, ctx->dst_fmt.height)); in rotate_device_run()
293 f->fmt.pix = ctx->dst_fmt; in rotate_g_fmt_vid_cap()
354 ctx->dst_fmt = f->fmt.pix; in rotate_s_fmt_vid_cap()
386 ctx->dst_fmt.xfer_func = f->fmt.pix.xfer_func; in rotate_s_fmt_vid_out()
387 ctx->dst_fmt.ycbcr_enc = f->fmt.pix.ycbcr_enc; in rotate_s_fmt_vid_out()
434 pix_fmt = &ctx->dst_fmt; in rotate_queue_setup()
456 pix_fmt = &ctx->dst_fmt; in rotate_buf_prepare()
584 if (fmt.width != ctx->dst_fmt.width || in rotate_s_ctrl()
585 fmt.height != ctx->dst_fmt.height || in rotate_s_ctrl()
[all …]
A Dsun8i-rotate.h109 struct v4l2_pix_format dst_fmt; member
/drivers/media/platform/sunxi/sun8i-di/
A Dsun8i-di.c139 width = ctx->dst_fmt.width; in deinterlace_device_run()
140 height = ctx->dst_fmt.height; in deinterlace_device_run()
141 stride = ctx->dst_fmt.bytesperline; in deinterlace_device_run()
398 f->fmt.pix = ctx->dst_fmt; in deinterlace_g_fmt_vid_cap()
458 ctx->dst_fmt = f->fmt.pix; in deinterlace_s_fmt_vid_cap()
526 pix_fmt = &ctx->dst_fmt; in deinterlace_queue_setup()
548 pix_fmt = &ctx->dst_fmt; in deinterlace_buf_prepare()
727 ctx->dst_fmt.field = V4L2_FIELD_NONE; in deinterlace_open()
728 ctx->dst_fmt.width = 640; in deinterlace_open()
729 ctx->dst_fmt.height = 480; in deinterlace_open()
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/drivers/staging/media/sunxi/cedrus/
A Dcedrus_video.c243 f->fmt.pix = ctx->dst_fmt; in cedrus_g_fmt_vid_cap()
321 ctx->dst_fmt = f->fmt.pix; in cedrus_s_fmt_vid_cap()
328 ctx->dst_fmt.pixelformat = 0; in cedrus_reset_cap_format()
329 cedrus_try_fmt_vid_cap_p(ctx, &ctx->dst_fmt); in cedrus_reset_cap_format()
374 ctx->dst_fmt.colorspace = pix_fmt->colorspace; in cedrus_s_fmt_vid_out_p()
375 ctx->dst_fmt.xfer_func = pix_fmt->xfer_func; in cedrus_s_fmt_vid_out_p()
376 ctx->dst_fmt.ycbcr_enc = pix_fmt->ycbcr_enc; in cedrus_s_fmt_vid_out_p()
377 ctx->dst_fmt.quantization = pix_fmt->quantization; in cedrus_s_fmt_vid_out_p()
459 pix_fmt = &ctx->dst_fmt; in cedrus_queue_setup()
509 pix_fmt = &ctx->dst_fmt; in cedrus_buf_prepare()
A Dcedrus.h120 struct v4l2_pix_format dst_fmt; member
237 return buf ? cedrus_buf_addr(buf, &ctx->dst_fmt, plane) : 0; in cedrus_dst_buf_addr()
A Dcedrus_h265.c817 unsigned int stride = ALIGN(ctx->dst_fmt.width / 4, 32); in cedrus_h265_setup()
819 reg = ctx->dst_fmt.sizeimage - in cedrus_h265_setup()
820 cedrus_h265_2bit_size(ctx->dst_fmt.width, in cedrus_h265_setup()
821 ctx->dst_fmt.height); in cedrus_h265_setup()
A Dcedrus_dec.c95 cedrus_dst_format_set(dev, &ctx->dst_fmt); in cedrus_device_run()
/drivers/media/platform/samsung/s5p-mfc/
A Ds5p_mfc_dec.c372 pix_mp->num_planes = ctx->dst_fmt->num_planes; in vidioc_g_fmt()
375 pix_mp->pixelformat = ctx->dst_fmt->fourcc; in vidioc_g_fmt()
380 if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || ctx->dst_fmt->fourcc == in vidioc_g_fmt()
462 ctx->dst_fmt = find_format(f, MFC_FMT_RAW); in vidioc_s_fmt()
959 format = v4l2_format_info(ctx->dst_fmt->fourcc); in s5p_mfc_queue_setup()
984 if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || ctx->dst_fmt->fourcc == in s5p_mfc_queue_setup()
992 if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || ctx->dst_fmt->fourcc == in s5p_mfc_queue_setup()
1027 if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || ctx->dst_fmt->fourcc == in s5p_mfc_buf_init()
1040 if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || ctx->dst_fmt->fourcc == in s5p_mfc_buf_init()
1252 ctx->dst_fmt = find_format(&f, MFC_FMT_RAW); in s5p_mfc_dec_init()
[all …]
A Ds5p_mfc_opr_v6.c496 switch (ctx->dst_fmt->fourcc) { in s5p_mfc_dec_calc_dpb_size_v6()
627 if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || ctx->dst_fmt->fourcc == in s5p_mfc_set_dec_frame_buffer_v6()
636 if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || ctx->dst_fmt->fourcc == in s5p_mfc_set_dec_frame_buffer_v6()
667 if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || ctx->dst_fmt->fourcc == in s5p_mfc_set_dec_frame_buffer_v6()
1786 if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_NV12MT_16X16) in s5p_mfc_init_decode_v6()
1795 if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M) in s5p_mfc_init_decode_v6()
1797 else if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YVU420M) in s5p_mfc_init_decode_v6()
1799 else if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_NV21M) in s5p_mfc_init_decode_v6()
A Ds5p_mfc_enc.c1401 pix_fmt_mp->pixelformat = ctx->dst_fmt->fourcc; in vidioc_g_fmt()
1402 pix_fmt_mp->num_planes = ctx->dst_fmt->num_planes; in vidioc_g_fmt()
1490 ctx->dst_fmt = find_format(f, MFC_FMT_ENC); in vidioc_s_fmt()
1492 ctx->codec_mode = ctx->dst_fmt->codec_mode; in vidioc_s_fmt()
2430 if (ctx->dst_fmt) in s5p_mfc_queue_setup()
2431 *plane_count = ctx->dst_fmt->num_planes; in s5p_mfc_queue_setup()
2485 ret = check_vb_with_fmt(ctx->dst_fmt, vb); in s5p_mfc_buf_init()
2523 ret = check_vb_with_fmt(ctx->dst_fmt, vb); in s5p_mfc_buf_prepare()
2756 ctx->dst_fmt = find_format(&f, MFC_FMT_ENC); in s5p_mfc_enc_init()
/drivers/media/platform/ti/vpe/
A Dcsc.c140 struct v4l2_format *src_fmt, struct v4l2_format *dst_fmt) in csc_set_coeff() argument
164 if (V4L2_TYPE_IS_MULTIPLANAR(dst_fmt->type)) { in csc_set_coeff()
165 mp = &dst_fmt->fmt.pix_mp; in csc_set_coeff()
170 pix = &dst_fmt->fmt.pix; in csc_set_coeff()
A Dcsc.h61 struct v4l2_format *src_fmt, struct v4l2_format *dst_fmt);
/drivers/gpu/drm/exynos/
A Dexynos_drm_scaler.c207 u32 dst_fmt) in scaler_set_dst_fmt() argument
211 val = SCALER_DST_CFG_SET_COLOR_FORMAT(dst_fmt); in scaler_set_dst_fmt()
365 const struct scaler_format *src_fmt, *dst_fmt; in scaler_commit() local
369 dst_fmt = scaler_get_format(task->dst.buf.fourcc); in scaler_commit()
387 scaler_set_dst_fmt(scaler, dst_fmt->internal_fmt); in scaler_commit()
/drivers/media/platform/st/sti/bdisp/
A Dbdisp-hw.c769 u32 src_fmt, dst_fmt; in bdisp_hw_build_node() local
787 dst_fmt = dst->fmt->pixelformat; in bdisp_hw_build_node()
831 node->tty |= bdisp_hw_color_format(dst_fmt); in bdisp_hw_build_node()

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