| /drivers/media/platform/ti/vpe/ |
| A D | sc.c | 62 unsigned int dst_w) in sc_set_hs_coeffs() argument
70 if (dst_w > src_w) { in sc_set_hs_coeffs()
73 if ((dst_w << 1) < src_w) in sc_set_hs_coeffs()
75 if ((dst_w << 1) < src_w) in sc_set_hs_coeffs()
78 if (dst_w == src_w) { in sc_set_hs_coeffs()
81 sixteenths = (dst_w << 4) / src_w; in sc_set_hs_coeffs()
149 unsigned int dst_w, unsigned int dst_h) in sc_config_scaler() argument
178 if (src_w == dst_w && src_h == dst_h) { in sc_config_scaler()
190 dcm_x = src_w / dst_w; in sc_config_scaler()
201 lltmp = dst_w - 1; in sc_config_scaler()
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| A D | sc.h | 200 unsigned int dst_w);
205 unsigned int dst_w, unsigned int dst_h);
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| /drivers/media/pci/ivtv/ |
| A D | ivtv-yuv.c | 236 reg_2834 = f->dst_w; in ivtv_yuv_handle_horizontal()
257 if (f->dst_w >= f->src_w) in ivtv_yuv_handle_horizontal()
263 if (f->dst_w < f->src_w) in ivtv_yuv_handle_horizontal()
286 if (f->dst_w > f->src_w) in ivtv_yuv_handle_horizontal()
676 f->dst_w += f->dst_w & 1; in ivtv_yuv_window_setup()
725 f->dst_w -= osd_crop; in ivtv_yuv_window_setup()
733 f->dst_w -= osd_crop; in ivtv_yuv_window_setup()
745 f->dst_w &= ~1; in ivtv_yuv_window_setup()
752 f->dst_w &= ~1; in ivtv_yuv_window_setup()
769 f->dst_w += f->dst_w & 1; in ivtv_yuv_window_setup()
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| /drivers/gpu/drm/sti/ |
| A D | sti_hqvdp.c | 482 int src_w, src_h, dst_w, dst_h; in hqvdp_dbg_dump_cmd() local
536 if (dst_w > src_w) in hqvdp_dbg_dump_cmd()
737 int dst_w, int dst_h) in sti_hqvdp_check_hw_scaling() argument
1032 int dst_x, dst_y, dst_w, dst_h; in sti_hqvdp_atomic_check() local
1056 dst_w, dst_h)) { in sti_hqvdp_atomic_check()
1070 dst_w = ALIGN(dst_w, 2); in sti_hqvdp_atomic_check()
1075 (dst_w > MAX_WIDTH) || (dst_w < MIN_WIDTH) || in sti_hqvdp_atomic_check()
1079 dst_w, dst_h); in sti_hqvdp_atomic_check()
1110 dst_w, dst_h, dst_x, dst_y, in sti_hqvdp_atomic_check()
1128 int dst_x, dst_y, dst_w, dst_h; in sti_hqvdp_atomic_update() local
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| A D | sti_vid.c | 146 int dst_w = clamp_val(state->crtc_w, 0, mode->hdisplay - dst_x); in sti_vid_commit() local
153 dst_w = ALIGN(dst_w, 2); in sti_vid_commit()
164 xds = sti_vtg_get_pixel_number(*mode, dst_x + dst_w - 1); in sti_vid_commit()
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| A D | sti_gdp.c | 631 int dst_x, dst_y, dst_w, dst_h; in sti_gdp_atomic_check() local
647 dst_w = clamp_val(new_plane_state->crtc_w, 0, mode->hdisplay - dst_x); in sti_gdp_atomic_check()
700 dst_w, dst_h, dst_x, dst_y, in sti_gdp_atomic_check()
718 int dst_x, dst_y, dst_w, dst_h; in sti_gdp_atomic_update() local
761 dst_w = clamp_val(newstate->crtc_w, 0, mode->hdisplay - dst_x); in sti_gdp_atomic_update()
797 dst_w = sti_gdp_get_dst(gdp->dev, dst_w, src_w); in sti_gdp_atomic_update()
802 xds = sti_vtg_get_pixel_number(*mode, dst_x + dst_w - 1); in sti_gdp_atomic_update()
807 src_w = dst_w; in sti_gdp_atomic_update()
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| A D | sti_cursor.c | 195 int dst_x, dst_y, dst_w, dst_h; in sti_cursor_atomic_check() local
209 dst_w = clamp_val(new_plane_state->crtc_w, 0, in sti_cursor_atomic_check()
257 DRM_DEBUG_KMS("(%dx%d)@(%d,%d)\n", dst_w, dst_h, dst_x, dst_y); in sti_cursor_atomic_check()
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| /drivers/media/platform/rockchip/rga/ |
| A D | rga-hw.c | 158 unsigned int src_h, src_w, dst_h, dst_w; in rga_cmd_set_trans_info() local
171 dst_w = ctx->out.crop.width; in rga_cmd_set_trans_info()
246 if (dst_w == src_h) in rga_cmd_set_trans_info()
252 scale_dst_h = dst_w; in rga_cmd_set_trans_info()
255 scale_dst_w = dst_w; in rga_cmd_set_trans_info()
297 dst_act_info.data.act_width = dst_w - 1; in rga_cmd_set_trans_info()
346 unsigned int dst_h, dst_w, dst_x, dst_y; in rga_cmd_set_dst_info() local
351 dst_w = ctx->out.crop.width; in rga_cmd_set_dst_info()
378 offsets = rga_get_addr_offset(&ctx->out, offset, dst_x, dst_y, dst_w, dst_h); in rga_cmd_set_dst_info()
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| /drivers/gpu/drm/sun4i/ |
| A D | sun8i_ui_layer.c | 54 u32 src_w, src_h, dst_w, dst_h; in sun8i_ui_layer_update_coord() local
69 dst_w = drm_rect_width(&state->dst); in sun8i_ui_layer_update_coord()
76 outsize = SUN8I_MIXER_SIZE(dst_w, dst_h); in sun8i_ui_layer_update_coord()
99 dst_w, dst_h, hscale, vscale, in sun8i_ui_layer_update_coord()
105 dst_w, dst_h, hscale, vscale, in sun8i_ui_layer_update_coord()
120 DRM_DEBUG_DRIVER("Layer destination size W: %d H: %d\n", dst_w, dst_h); in sun8i_ui_layer_update_coord()
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| A D | sun8i_vi_layer.c | 57 u32 src_w, src_h, dst_w, dst_h; in sun8i_vi_layer_update_coord() local
75 dst_w = drm_rect_width(&state->dst); in sun8i_vi_layer_update_coord()
101 outsize = SUN8I_MIXER_SIZE(dst_w, dst_h); in sun8i_vi_layer_update_coord()
134 do_div(ability, mode->vdisplay * fps * max(src_w, dst_w)); in sun8i_vi_layer_update_coord()
155 hscale = (src_w << 16) / dst_w; in sun8i_vi_layer_update_coord()
158 sun8i_vi_scaler_setup(mixer, channel, src_w, src_h, dst_w, in sun8i_vi_layer_update_coord()
187 DRM_DEBUG_DRIVER("Layer destination size W: %d H: %d\n", dst_w, dst_h); in sun8i_vi_layer_update_coord()
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| A D | sun8i_ui_scaler.c | 149 u32 src_w, u32 src_h, u32 dst_w, u32 dst_h, in sun8i_ui_scaler_setup() argument
167 outsize = SUN8I_UI_SCALER_SIZE(dst_w, dst_h); in sun8i_ui_scaler_setup()
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| A D | sun8i_vi_scaler.c | 929 u32 src_w, u32 src_h, u32 dst_w, u32 dst_h, in sun8i_vi_scaler_setup() argument
945 outsize = SUN8I_VI_SCALER_SIZE(dst_w, dst_h); in sun8i_vi_scaler_setup()
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| A D | sun8i_ui_scaler.h | 40 u32 src_w, u32 src_h, u32 dst_w, u32 dst_h,
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| A D | sun8i_vi_scaler.h | 74 u32 src_w, u32 src_h, u32 dst_w, u32 dst_h,
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| /drivers/gpu/drm/meson/ |
| A D | meson_plane.c | 148 int src_w, src_h, dst_w, dst_h; in meson_plane_atomic_update() local
266 dst_w = new_state->crtc_w; in meson_plane_atomic_update()
282 hf_phase_step = ((src_w << 18) / dst_w) << 6; in meson_plane_atomic_update()
293 if (src_h != dst_h || src_w != dst_w) { in meson_plane_atomic_update()
332 if (src_w != dst_w) { in meson_plane_atomic_update()
363 priv->viu.osb_blend0_size = dst_h << 16 | dst_w; in meson_plane_atomic_update()
364 priv->viu.osb_blend1_size = dst_h << 16 | dst_w; in meson_plane_atomic_update()
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| /drivers/gpu/drm/ |
| A D | drm_rect.c | 173 int dst_w = drm_rect_width(dst); in drm_rect_calc_hscale() local
174 int hscale = drm_calc_scale(src_w, dst_w); in drm_rect_calc_hscale()
176 if (hscale < 0 || dst_w == 0) in drm_rect_calc_hscale()
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| /drivers/gpu/drm/imx/dcss/ |
| A D | dcss-plane.c | 280 u32 src_w, src_h, dst_w, dst_h; in dcss_plane_atomic_update() local
305 dst_w = drm_rect_width(&dst); in dcss_plane_atomic_update()
332 dst_w, dst_h, in dcss_plane_atomic_update()
336 dst.x1, dst.y1, dst_w, dst_h); in dcss_plane_atomic_update()
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| /drivers/gpu/drm/i915/display/ |
| A D | skl_scaler.c | 140 int src_w, int src_h, int dst_w, int dst_h, in skl_update_scaler() argument
160 if (src_w != dst_w || src_h != dst_h) in skl_update_scaler()
211 dst_w < min_dst_w || dst_h < min_dst_h || in skl_update_scaler()
213 dst_w > max_dst_w || dst_h > max_dst_h) { in skl_update_scaler()
219 dst_w, dst_h); in skl_update_scaler()
245 crtc->pipe, scaler_user, src_w, src_h, dst_w, dst_h, in skl_update_scaler()
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| A D | intel_plane.c | 207 unsigned int src_w, src_h, dst_w, dst_h; in intel_adjusted_rate() local
211 dst_w = drm_rect_width(dst); in intel_adjusted_rate()
215 dst_w = min(src_w, dst_w); in intel_adjusted_rate()
219 dst_w * dst_h); in intel_adjusted_rate()
448 int dst_w = drm_rect_width(&plane_state->uapi.dst); in intel_plane_is_scaled() local
451 return src_w != dst_w || src_h != dst_h; in intel_plane_is_scaled()
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| A D | intel_sprite.c | 573 unsigned int src_w, dst_w, pixel_rate; in ivb_sprite_min_cdclk() local
586 dst_w = drm_rect_width(&plane_state->uapi.dst); in ivb_sprite_min_cdclk()
588 if (src_w != dst_w) in ivb_sprite_min_cdclk()
594 dst_w = min(src_w, dst_w); in ivb_sprite_min_cdclk()
597 den * dst_w); in ivb_sprite_min_cdclk()
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| /drivers/media/platform/st/sti/bdisp/ |
| A D | bdisp-hw.c | 630 u32 src_w, src_h, dst_w, dst_h; in bdisp_hw_get_hv_inc() local
634 dst_w = ctx->dst.crop.width; in bdisp_hw_get_hv_inc()
637 if (bdisp_hw_get_inc(src_w, dst_w, h_inc) || in bdisp_hw_get_hv_inc()
641 src_w, src_h, dst_w, dst_h); in bdisp_hw_get_hv_inc()
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| /drivers/gpu/drm/rockchip/ |
| A D | rockchip_drm_vop.c | 382 uint32_t src_w, uint32_t src_h, uint32_t dst_w, in scl_vop_cal_scl_fac() argument
399 if (dst_w > 4096) { in scl_vop_cal_scl_fac()
406 scl_cal_scale2(src_w, dst_w)); in scl_vop_cal_scl_fac()
411 scl_cal_scale2(cbcr_src_w, dst_w)); in scl_vop_cal_scl_fac()
418 yrgb_hor_scl_mode = scl_get_scl_mode(src_w, dst_w); in scl_vop_cal_scl_fac()
422 cbcr_hor_scl_mode = scl_get_scl_mode(cbcr_src_w, dst_w); in scl_vop_cal_scl_fac()
425 lb_mode = scl_vop_cal_lb_mode(dst_w, true); in scl_vop_cal_scl_fac()
430 lb_mode = scl_vop_cal_lb_mode(dst_w, false); in scl_vop_cal_scl_fac()
452 val = scl_vop_cal_scale(yrgb_hor_scl_mode, src_w, dst_w, in scl_vop_cal_scl_fac()
469 dst_w, true, 0, NULL); in scl_vop_cal_scl_fac()
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| /drivers/gpu/drm/exynos/ |
| A D | exynos_drm_gsc.c | 748 u32 src_w, src_h, dst_w, dst_h; in gsc_set_prescaler() local
755 dst_w = dst->h; in gsc_set_prescaler()
758 dst_w = dst->w; in gsc_set_prescaler()
762 ret = gsc_get_ratio_shift(ctx, src_w, dst_w, &sc->pre_hratio); in gsc_set_prescaler()
777 sc->main_hratio = (src_w << 16) / dst_w; in gsc_set_prescaler()
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| A D | exynos_drm_fimc.c | 744 u32 src_w, src_h, dst_w, dst_h; in fimc_set_prescaler() local
756 dst_w = dst->h; in fimc_set_prescaler()
759 dst_w = dst->w; in fimc_set_prescaler()
764 hfactor = fls(src_w / dst_w / 2); in fimc_set_prescaler()
783 sc->hratio = (src_w << 14) / (dst_w << hfactor); in fimc_set_prescaler()
785 sc->up_h = (dst_w >= src_w); in fimc_set_prescaler()
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| /drivers/gpu/drm/tegra/ |
| A D | plane.c | 228 unsigned int i, bpp, dst_w, dst_h, src_w, src_h, mul; in tegra_plane_calculate_memory_bandwidth() local
243 dst_w = drm_rect_width(&state->dst); in tegra_plane_calculate_memory_bandwidth()
270 avg_bandwidth = min(src_w, dst_w) * min(src_h, dst_h); in tegra_plane_calculate_memory_bandwidth()
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