| /drivers/iommu/intel/ |
| A D | trace.h | 60 u64 dw0, u64 dw1, u64 dw2, u64 dw3,
63 TP_ARGS(iommu, dev, dw0, dw1, dw2, dw3, seq),
66 __field(u64, dw0)
77 __entry->dw0 = dw0;
88 decode_prq_descriptor(__get_str(buff), MSG_MAX, __entry->dw0,
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| A D | iommu.h | 1425 u64 dw0, u64 dw1, u64 dw2, u64 dw3) in decode_prq_descriptor() argument
1432 FIELD_GET(GENMASK_ULL(31, 16), dw0), in decode_prq_descriptor()
1436 dw0 & BIT_ULL(52) ? 'x' : '-', in decode_prq_descriptor()
1437 dw0 & BIT_ULL(53) ? 'p' : '-', in decode_prq_descriptor()
1439 FIELD_GET(GENMASK_ULL(51, 32), dw0), in decode_prq_descriptor()
1443 if (dw0 & BIT_ULL(9)) { in decode_prq_descriptor()
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| /drivers/dma/amd/ptdma/ |
| A D | ptdma-dev.c | 71 bool soc = FIELD_GET(DWORD0_SOC, desc->dw0); in pt_core_execute_cmd()
77 desc->dw0 |= FIELD_PREP(DWORD0_IOC, desc->dw0); in pt_core_execute_cmd()
78 desc->dw0 &= ~DWORD0_SOC; in pt_core_execute_cmd()
109 desc.dw0 = CMD_DESC_DW0_VAL; in pt_core_perform_passthru()
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| A D | ptdma-dmaengine.c | 116 bool soc = FIELD_GET(DWORD0_SOC, desc->dwouv.dw0); in ae4_core_execute_cmd()
120 desc->dwouv.dw0 |= FIELD_PREP(DWORD0_IOC, desc->dwouv.dw0); in ae4_core_execute_cmd()
121 desc->dwouv.dw0 &= ~DWORD0_SOC; in ae4_core_execute_cmd()
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| A D | ptdma.h | 300 u32 dw0; member
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| /drivers/gpu/drm/xe/ |
| A D | xe_gt_pagefault.c | 239 reply->dw0, in send_pagefault_reply()
276 pf->fault_level = FIELD_GET(PFD_FAULT_LEVEL, desc->dw0); in get_pagefault()
277 pf->trva_fault = FIELD_GET(XE2_PFD_TRVA_FAULT, desc->dw0); in get_pagefault()
278 pf->engine_class = FIELD_GET(PFD_ENG_CLASS, desc->dw0); in get_pagefault()
279 pf->engine_instance = FIELD_GET(PFD_ENG_INSTANCE, desc->dw0); in get_pagefault()
282 pf->pdata |= FIELD_GET(PFD_PDATA_LO, desc->dw0); in get_pagefault()
365 reply.dw0 = FIELD_PREP(PFR_VALID, 1) | in pf_queue_work_func()
606 FIELD_GET(ACC_SUBG_LO, desc->dw0); in get_acc()
611 acc->access_type = FIELD_GET(ACC_TYPE, desc->dw0); in get_acc()
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| A D | xe_guc_fwif.h | 238 u32 dw0; member
294 u32 dw0; member
322 u32 dw0; member
342 u32 dw0; member
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| /drivers/scsi/hisi_sas/ |
| A D | hisi_sas_v3_hw.c | 476 u32 dw0; member
486 __le32 dw0; member
1269 prot->dw0 |= T10_CHK_EN_MSK; in fill_prot_v3_hw()
1306 prot->dw0 |= INCR_LBRT_MSK; in fill_prot_v3_hw()
2253 u32 dw0, dw3; in is_ncq_err_v3_hw() local
2255 dw0 = le32_to_cpu(complete_hdr->dw0); in is_ncq_err_v3_hw()
2278 u32 dw0 = le32_to_cpu(complete_hdr->dw0); in slot_err_v3_hw() local
2354 u32 dw0, dw1, dw3; in slot_complete_v3_hw() local
2377 dw0 = le32_to_cpu(complete_hdr->dw0); in slot_complete_v3_hw()
2514 u32 dw0, dw1, dw3; in complete_v3_hw() local
[all …]
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| A D | hisi_sas_v2_hw.c | 388 __le32 dw0; member
2032 u32 dw0 = le32_to_cpu(complete_hdr->dw0); in slot_err_v2_hw() local
2341 u32 dw0; in slot_complete_v2_hw() local
2365 dw0 = le32_to_cpu(complete_hdr->dw0); in slot_complete_v2_hw()
2392 if ((dw0 & CMPLT_HDR_ERX_MSK) && (!(dw0 & CMPLT_HDR_RSPNS_XFRD_MSK))) { in slot_complete_v2_hw()
2507 u32 dw0, dw1 = 0, dw2 = 0; in prep_ata_v2_hw() local
2513 dw0 |= 3 << CMD_HDR_CMD_OFF; in prep_ata_v2_hw()
2517 dw0 |= CMD_HDR_FORCE_PHY_MSK; in prep_ata_v2_hw()
2518 dw0 |= 4 << CMD_HDR_CMD_OFF; in prep_ata_v2_hw()
2522 dw0 |= CMD_HDR_FORCE_PHY_MSK; in prep_ata_v2_hw()
[all …]
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| A D | hisi_sas.h | 507 __le32 dw0; member
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| A D | hisi_sas_v1_hw.c | 932 hdr->dw0 = cpu_to_le32((port->id << CMD_HDR_PORT_OFF) | in prep_smp_v1_hw()
967 hdr->dw0 = cpu_to_le32((1 << CMD_HDR_RESP_REPORT_OFF) | in prep_ssp_v1_hw()
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| /drivers/crypto/hisilicon/ |
| A D | qm_common.h | 19 __le32 dw0; member
23 __le32 dw0; member
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| A D | qm.c | 65 #define QM_EQE_PHASE(eqe) ((le32_to_cpu((eqe)->dw0) >> 16) & 0x1)
68 #define QM_AEQE_PHASE(aeqe) ((le32_to_cpu((aeqe)->dw0) >> 16) & 0x1)
987 cqn = le32_to_cpu(eqe->dw0) & QM_EQE_CQN_MASK; in qm_get_complete_eqe_num()
993 cqn = le32_to_cpu(eqe->dw0) & QM_EQE_CQN_MASK; in qm_get_complete_eqe_num()
1106 type = (le32_to_cpu(aeqe->dw0) >> QM_AEQE_TYPE_SHIFT) & in qm_aeq_thread()
1108 qp_id = le32_to_cpu(aeqe->dw0) & QM_AEQE_CQN_MASK; in qm_aeq_thread()
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| /drivers/crypto/hisilicon/hpre/ |
| A D | hpre_crypto.c | 370 err = (le32_to_cpu(sqe->dw0) >> HPRE_SQE_ALG_BITS) & in hpre_alg_res_post_hf()
373 done = (le32_to_cpu(sqe->dw0) >> HPRE_SQE_DONE_SHIFT) & in hpre_alg_res_post_hf()
379 alg = le32_to_cpu(sqe->dw0) & HREE_ALG_TYPE_MASK; in hpre_alg_res_post_hf()
561 msg->dw0 |= cpu_to_le32(0x1 << HPRE_SQE_DONE_SHIFT); in hpre_msg_request_set()
625 msg->dw0 = cpu_to_le32(le32_to_cpu(msg->dw0) | HPRE_ALG_DH_G2); in hpre_dh_compute_value()
627 msg->dw0 = cpu_to_le32(le32_to_cpu(msg->dw0) | HPRE_ALG_DH); in hpre_dh_compute_value()
827 msg->dw0 |= cpu_to_le32(HPRE_ALG_NC_NCRT); in hpre_rsa_enc()
877 msg->dw0 = cpu_to_le32(le32_to_cpu(msg->dw0) | in hpre_rsa_dec()
881 msg->dw0 = cpu_to_le32(le32_to_cpu(msg->dw0) | in hpre_rsa_dec()
1627 msg->dw0 = cpu_to_le32(le32_to_cpu(msg->dw0) | HPRE_ALG_ECC_MUL); in hpre_ecdh_compute_value()
[all …]
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| A D | hpre.h | 89 __le32 dw0; member
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| /drivers/usb/isp1760/ |
| A D | isp1760-hcd.c | 59 __dw dw0; member
70 __le32 dw0; member
514 ptd->dw0 = le32_to_dw(le32_ptd.dw0); in isp1763_ptd_read()
541 ptd.dw0 = dw_to_le32(cpu_ptd->dw0); in isp1763_ptd_write()
551 8 * sizeof(ptd.dw0)); in isp1763_ptd_write()
567 sizeof(ptd->dw0)); in isp1760_ptd_write()
833 ptd->dw0 = DW0_VALID_BIT; in create_ptd_atl()
834 ptd->dw0 |= TO_DW0_LENGTH(qtd->length); in create_ptd_atl()
866 ptd->dw0 |= TO_DW0_MULTI(multi); in create_ptd_atl()
1437 ptd.dw0 |= DW0_VALID_BIT; in handle_done_ptds()
[all …]
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| /drivers/net/wireless/mediatek/mt76/ |
| A D | mt76x02_usb_core.c | 148 u32 tbtt, dw0, dw1; in mt76x02u_restart_pre_tbtt_timer() local
155 dw0 = mt76_rr(dev, MT_TSF_TIMER_DW0); in mt76x02u_restart_pre_tbtt_timer()
157 tsf = (u64)dw0 << 32 | dw1; in mt76x02u_restart_pre_tbtt_timer()
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| /drivers/usb/mtu3/ |
| A D | mtu3_trace.h | 179 __field(u32, dw0)
187 __entry->dw0 = le32_to_cpu(gpd->dw0_info);
194 __entry->dw0, __entry->dw1,
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| /drivers/dma/amd/ae4dma/ |
| A D | ae4dma.h | 66 u32 dw0; member
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| /drivers/net/ethernet/huawei/hinic/ |
| A D | hinic_debugfs.c | 115 ret = funcfg_table_elem->dw0.bs.valid; in hinic_dbg_get_func_table()
118 ret = funcfg_table_elem->dw0.bs.nic_rx_mode; in hinic_dbg_get_func_table()
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| A D | hinic_debugfs.h | 41 } dw0; member
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| /drivers/dma/ |
| A D | hisi_dma.c | 113 __le32 dw0; member
525 sqe->dw0 = cpu_to_le32(FIELD_PREP(OPCODE_MASK, OPCODE_M2M)); in hisi_dma_start_transfer()
526 sqe->dw0 |= cpu_to_le32(LOCAL_IRQ_EN); in hisi_dma_start_transfer()
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| /drivers/crypto/ccp/ |
| A D | ccp-dev.h | 621 struct dword0 dw0; member
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| A D | ccp-dev-v5.c | 156 #define CCP5_CMD_DW0(p) ((p)->dw0)
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| /drivers/pci/ |
| A D | pci.c | 3331 u32 dw0, bei, base, max_offset; in pci_ea_read() local
3335 pci_read_config_dword(dev, ent_offset, &dw0); in pci_ea_read()
3339 ent_size = (FIELD_GET(PCI_EA_ES, dw0) + 1) << 2; in pci_ea_read()
3341 if (!(dw0 & PCI_EA_ENABLE)) /* Entry not enabled */ in pci_ea_read()
3344 bei = FIELD_GET(PCI_EA_BEI, dw0); in pci_ea_read()
3345 prop = FIELD_GET(PCI_EA_PP, dw0); in pci_ea_read()
3352 prop = FIELD_GET(PCI_EA_SP, dw0); in pci_ea_read()
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