| /drivers/gpu/drm/xe/display/ext/ |
| A D | i915_irq.c | 59 intel_uncore_write(uncore, regs.eir, 0xffffffff); in gen2_error_reset()
60 intel_uncore_posting_read(uncore, regs.eir); in gen2_error_reset()
61 intel_uncore_write(uncore, regs.eir, 0xffffffff); in gen2_error_reset()
62 intel_uncore_posting_read(uncore, regs.eir); in gen2_error_reset()
68 intel_uncore_write(uncore, regs.eir, 0xffffffff); in gen2_error_init()
69 intel_uncore_posting_read(uncore, regs.eir); in gen2_error_init()
70 intel_uncore_write(uncore, regs.eir, 0xffffffff); in gen2_error_init()
71 intel_uncore_posting_read(uncore, regs.eir); in gen2_error_init()
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| /drivers/gpu/drm/i915/ |
| A D | i915_irq.c | 129 intel_uncore_write(uncore, regs.eir, 0xffffffff); in gen2_error_reset()
130 intel_uncore_posting_read(uncore, regs.eir); in gen2_error_reset()
132 intel_uncore_posting_read(uncore, regs.eir); in gen2_error_reset()
139 intel_uncore_posting_read(uncore, regs.eir); in gen2_error_init()
141 intel_uncore_posting_read(uncore, regs.eir); in gen2_error_init()
245 u32 eir = 0, dpinvgtt = 0; in valleyview_irq_handler() local
339 u32 eir = 0, dpinvgtt = 0; in cherryview_irq_handler() local
857 u32 *eir, u32 *eir_stuck) in i9xx_error_irq_ack() argument
884 u32 eir, u32 eir_stuck) in i9xx_error_irq_handler() argument
956 u32 eir = 0, eir_stuck = 0; in i915_irq_handler() local
[all …]
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| A D | i915_reg_defs.h | 213 i915_reg_t eir; member
217 ((const struct i915_error_regs){ .emr = (_emr), .eir = (_eir) })
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| A D | i915_gpu_error.h | 147 u32 eir; member
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| A D | i915_gpu_error.c | 737 err_printf(m, "EIR: 0x%08x\n", gt->eir); in err_print_gt_global_nonguc()
1803 gt->eir = intel_uncore_read(uncore, EIR); in gt_record_global_nonguc_regs()
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| /drivers/gpu/drm/i915/display/ |
| A D | intel_display_irq.h | 82 void vlv_display_error_irq_ack(struct intel_display *display, u32 *eir, u32 *dpinvgtt);
83 void vlv_display_error_irq_handler(struct intel_display *display, u32 eir, u32 dpinvgtt);
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| A D | intel_display_irq.c | 1832 u32 *eir, u32 *dpinvgtt) in vlv_display_error_irq_ack() argument
1836 *eir = intel_de_read(display, VLV_EIR); in vlv_display_error_irq_ack()
1838 if (*eir & VLV_ERROR_PAGE_TABLE) in vlv_display_error_irq_ack()
1841 intel_de_write(display, VLV_EIR, *eir); in vlv_display_error_irq_ack()
1854 u32 eir, u32 dpinvgtt) in vlv_display_error_irq_handler() argument
1856 drm_dbg(display->drm, "Master Error, EIR 0x%08x\n", eir); in vlv_display_error_irq_handler()
1858 if (eir & VLV_ERROR_PAGE_TABLE) in vlv_display_error_irq_handler()
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| /drivers/net/ethernet/microchip/ |
| A D | encx24j600.c | 404 int eir; in encx24j600_isr() local
409 eir = encx24j600_read_reg(priv, EIR); in encx24j600_isr()
411 if (eir & LINKIF) in encx24j600_isr()
414 if (eir & TXIF) in encx24j600_isr()
417 if (eir & TXABTIF) in encx24j600_isr()
420 if (eir & RXABTIF) { in encx24j600_isr()
421 if (eir & PCFULIF) { in encx24j600_isr()
429 if (eir & PKTIF) { in encx24j600_isr()
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| /drivers/gpu/drm/i915/gt/ |
| A D | intel_gt.c | 248 u32 eir; in intel_gt_clear_error_registers() local
259 eir = intel_uncore_read(uncore, EIR); in intel_gt_clear_error_registers()
260 if (eir) { in intel_gt_clear_error_registers()
265 gt_dbg(gt, "EIR stuck: 0x%08x, masking\n", eir); in intel_gt_clear_error_registers()
266 intel_uncore_rmw(uncore, EMR, 0, eir); in intel_gt_clear_error_registers()
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| A D | intel_execlists_submission.c | 2485 u32 eir; in execlists_irq_handler() local
2488 eir = ENGINE_READ(engine, RING_EIR) & GENMASK(15, 0); in execlists_irq_handler()
2489 ENGINE_TRACE(engine, "CS error: %x\n", eir); in execlists_irq_handler()
2492 if (likely(eir)) { in execlists_irq_handler()
2494 ENGINE_WRITE(engine, RING_EIR, eir); in execlists_irq_handler()
2495 WRITE_ONCE(engine->execlists.error_interrupt, eir); in execlists_irq_handler()
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| /drivers/net/ethernet/freescale/enetc/ |
| A D | enetc_hw.h | 971 __le32 eir; member
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| A D | enetc_qos.c | 887 fmi_config->eir = 0; in enetc_flowmeter_hw_set()
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| /drivers/net/ethernet/mellanox/mlxsw/ |
| A D | reg.h | 3970 MLXSW_ITEM32(reg, qpcr, eir, 0x10, 0, 32);
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