Searched refs:emc_dbg (Results 1 – 4 of 4) sorted by relevance
| /drivers/memory/tegra/ |
| A D | tegra210-emc-cc-r21021.c | 413 emc_dbg = emc_readl(emc, EMC_DBG); in tegra210_emc_r21021_set_clock()
445 emc_dbg(emc, STEPS, "Step 1\n"); in tegra210_emc_r21021_set_clock()
568 emc_dbg(emc, STEPS, "Step 2\n"); in tegra210_emc_r21021_set_clock()
584 emc_dbg(emc, STEPS, "Step 3\n"); in tegra210_emc_r21021_set_clock()
604 emc_dbg(emc, STEPS, "Step 4\n"); in tegra210_emc_r21021_set_clock()
615 emc_dbg(emc, STEPS, "Step 5\n"); in tegra210_emc_r21021_set_clock()
632 emc_dbg(emc, STEPS, "Step 6\n"); in tegra210_emc_r21021_set_clock()
638 emc_dbg(emc, STEPS, "Step 7\n"); in tegra210_emc_r21021_set_clock()
745 emc_dbg(emc, STEPS, "Step 8\n"); in tegra210_emc_r21021_set_clock()
982 emc_dbg(emc, STEPS, "Step 9\n"); in tegra210_emc_r21021_set_clock()
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| A D | tegra30-emc.c | 534 u32 emc_dbg; in emc_prepare_timing_change() local
555 emc_dbg = readl_relaxed(emc->regs + EMC_DBG); in emc_prepare_timing_change()
693 writel_relaxed(emc_dbg, emc->regs + EMC_DBG); in emc_prepare_timing_change()
728 writel_relaxed(emc_dbg, emc->regs + EMC_DBG); in emc_prepare_timing_change()
1117 u32 fbio_cfg5, emc_cfg, emc_dbg, emc_adr_cfg; in emc_setup_hw() local
1152 emc_dbg = readl_relaxed(emc->regs + EMC_DBG); in emc_setup_hw()
1153 emc_dbg |= EMC_DBG_CFG_PRIORITY; in emc_setup_hw()
1154 emc_dbg &= ~EMC_DBG_READ_MUX_ASSEMBLY; in emc_setup_hw()
1155 emc_dbg &= ~EMC_DBG_WRITE_MUX_ACTIVE; in emc_setup_hw()
1156 emc_dbg &= ~EMC_DBG_FORCE_UPDATE; in emc_setup_hw()
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| A D | tegra20-emc.c | 595 u32 emc_cfg, emc_dbg, emc_fbio, emc_adr_cfg; in emc_setup_hw() local
624 emc_dbg = readl_relaxed(emc->regs + EMC_DBG); in emc_setup_hw()
625 emc_dbg |= EMC_DBG_CFG_PRIORITY; in emc_setup_hw()
626 emc_dbg &= ~EMC_DBG_READ_MUX_ASSEMBLY; in emc_setup_hw()
627 emc_dbg &= ~EMC_DBG_WRITE_MUX_ACTIVE; in emc_setup_hw()
628 emc_dbg &= ~EMC_DBG_FORCE_UPDATE; in emc_setup_hw()
629 writel_relaxed(emc_dbg, emc->regs + EMC_DBG); in emc_setup_hw()
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| A D | tegra210-emc-core.c | 887 u32 emc_dbg = emc_readl(emc, EMC_DBG); in tegra210_emc_set_shadow_bypass() local
890 emc_writel(emc, emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE, EMC_DBG); in tegra210_emc_set_shadow_bypass()
892 emc_writel(emc, emc_dbg & ~EMC_DBG_WRITE_MUX_ACTIVE, EMC_DBG); in tegra210_emc_set_shadow_bypass()
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