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Searched refs:enable_mask (Results 1 – 25 of 411) sorted by relevance

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/drivers/clk/qcom/
A Dgcc-msm8660.c46 .enable_mask = BIT(8),
125 .enable_mask = BIT(11),
141 .enable_mask = BIT(9),
176 .enable_mask = BIT(11),
192 .enable_mask = BIT(9),
227 .enable_mask = BIT(11),
243 .enable_mask = BIT(9),
294 .enable_mask = BIT(9),
345 .enable_mask = BIT(9),
396 .enable_mask = BIT(9),
[all …]
A Dgcc-x1e80100.c56 .enable_mask = BIT(0),
95 .enable_mask = BIT(4),
112 .enable_mask = BIT(7),
129 .enable_mask = BIT(8),
146 .enable_mask = BIT(9),
1970 .enable_mask = BIT(0),
1985 .enable_mask = BIT(0),
2000 .enable_mask = BIT(0),
2020 .enable_mask = BIT(0),
2040 .enable_mask = BIT(0),
[all …]
A Dgcc-sm8250.c40 .enable_mask = BIT(0),
79 .enable_mask = BIT(4),
96 .enable_mask = BIT(9),
1063 .enable_mask = BIT(0),
1078 .enable_mask = BIT(0),
1098 .enable_mask = BIT(0),
1116 .enable_mask = BIT(0),
1134 .enable_mask = BIT(0),
1167 .enable_mask = BIT(0),
1180 .enable_mask = BIT(0),
[all …]
A Dgcc-ipq806x.c50 .enable_mask = BIT(0),
79 .enable_mask = BIT(4),
108 .enable_mask = BIT(8),
215 .enable_mask = BIT(14),
449 .enable_mask = BIT(9),
500 .enable_mask = BIT(9),
551 .enable_mask = BIT(9),
602 .enable_mask = BIT(9),
653 .enable_mask = BIT(9),
704 .enable_mask = BIT(9),
[all …]
A Dgcc-mdm9615.c65 .enable_mask = BIT(0),
78 .enable_mask = BIT(4),
107 .enable_mask = BIT(8),
136 .enable_mask = BIT(11),
207 .enable_mask = BIT(11),
223 .enable_mask = BIT(9),
258 .enable_mask = BIT(11),
274 .enable_mask = BIT(9),
325 .enable_mask = BIT(9),
376 .enable_mask = BIT(9),
[all …]
A Dgcc-sm8150.c40 .enable_mask = BIT(0),
83 .enable_mask = BIT(7),
101 .enable_mask = BIT(9),
1114 .enable_mask = BIT(0),
1129 .enable_mask = BIT(0),
1148 .enable_mask = BIT(1),
1167 .enable_mask = BIT(0),
1186 .enable_mask = BIT(1),
1203 .enable_mask = BIT(0),
1220 .enable_mask = BIT(0),
[all …]
A Dgcc-sc8180x.c53 .enable_mask = BIT(0),
95 .enable_mask = BIT(1),
114 .enable_mask = BIT(4),
133 .enable_mask = BIT(7),
150 .enable_mask = BIT(9),
1400 .enable_mask = BIT(0),
1415 .enable_mask = BIT(0),
1435 .enable_mask = BIT(1),
1455 .enable_mask = BIT(0),
1475 .enable_mask = BIT(1),
[all …]
A Dgcc-sc8280xp.c117 .enable_mask = BIT(0),
154 .enable_mask = BIT(2),
169 .enable_mask = BIT(4),
184 .enable_mask = BIT(7),
199 .enable_mask = BIT(8),
214 .enable_mask = BIT(9),
2590 .enable_mask = BIT(0),
2610 .enable_mask = BIT(1),
2630 .enable_mask = BIT(0),
2650 .enable_mask = BIT(1),
[all …]
A Dgcc-msm8960.c48 .enable_mask = BIT(4),
79 .enable_mask = BIT(8),
278 .enable_mask = BIT(14),
370 .enable_mask = BIT(11),
386 .enable_mask = BIT(9),
437 .enable_mask = BIT(9),
488 .enable_mask = BIT(9),
539 .enable_mask = BIT(9),
590 .enable_mask = BIT(9),
641 .enable_mask = BIT(9),
[all …]
A Dgcc-sc7180.c40 .enable_mask = BIT(0),
93 .enable_mask = BIT(1),
111 .enable_mask = BIT(4),
129 .enable_mask = BIT(6),
147 .enable_mask = BIT(7),
833 .enable_mask = BIT(0),
851 .enable_mask = BIT(0),
884 .enable_mask = BIT(0),
899 .enable_mask = BIT(0),
914 .enable_mask = BIT(3),
[all …]
A Dmmcc-msm8960.c209 .enable_mask = BIT(2),
224 .enable_mask = BIT(0),
260 .enable_mask = BIT(2),
275 .enable_mask = BIT(0),
311 .enable_mask = BIT(2),
326 .enable_mask = BIT(0),
368 .enable_mask = BIT(2),
383 .enable_mask = BIT(0),
401 .enable_mask = BIT(8),
436 .enable_mask = BIT(2),
[all …]
A Dgcc-sm6350.c39 .enable_mask = BIT(0),
100 .enable_mask = BIT(6),
139 .enable_mask = BIT(7),
805 .enable_mask = BIT(0),
825 .enable_mask = BIT(1),
845 .enable_mask = BIT(1),
865 .enable_mask = BIT(0),
900 .enable_mask = BIT(0),
916 .enable_mask = BIT(0),
931 .enable_mask = BIT(0),
[all …]
A Decpricc-qdu1000.c67 .enable_mask = BIT(0),
97 .enable_mask = BIT(1),
745 .enable_mask = BIT(0),
763 .enable_mask = BIT(0),
781 .enable_mask = BIT(0),
799 .enable_mask = BIT(0),
817 .enable_mask = BIT(0),
835 .enable_mask = BIT(0),
853 .enable_mask = BIT(0),
871 .enable_mask = BIT(0),
[all …]
A Dgcc-msm8996.c53 .enable_mask = BIT(0),
95 .enable_mask = BIT(0),
112 .enable_mask = BIT(2),
130 .enable_mask = BIT(4),
1181 .enable_mask = BIT(0),
1198 .enable_mask = BIT(0),
1215 .enable_mask = BIT(0),
1232 .enable_mask = BIT(0),
1245 .enable_mask = BIT(0),
1258 .enable_mask = BIT(0),
[all …]
A Dgcc-msm8998.c42 .enable_mask = BIT(0),
113 .enable_mask = BIT(1),
184 .enable_mask = BIT(2),
255 .enable_mask = BIT(3),
326 .enable_mask = BIT(4),
1222 .enable_mask = BIT(0),
1235 .enable_mask = BIT(0),
1253 .enable_mask = BIT(0),
1271 .enable_mask = BIT(0),
1284 .enable_mask = BIT(0),
[all …]
A Dgcc-sm6125.c46 .enable_mask = BIT(0),
89 .enable_mask = BIT(3),
106 .enable_mask = BIT(4),
123 .enable_mask = BIT(5),
140 .enable_mask = BIT(6),
170 .enable_mask = BIT(7),
200 .enable_mask = BIT(8),
230 .enable_mask = BIT(9),
1363 .enable_mask = BIT(0),
1378 .enable_mask = BIT(0),
[all …]
A Dgcc-sm7150.c46 .enable_mask = BIT(0),
101 .enable_mask = BIT(6),
118 .enable_mask = BIT(7),
973 .enable_mask = BIT(0),
988 .enable_mask = BIT(0),
1008 .enable_mask = BIT(1),
1026 .enable_mask = BIT(0),
1044 .enable_mask = BIT(0),
1077 .enable_mask = BIT(0),
1090 .enable_mask = BIT(0),
[all …]
A Dgcc-qcs615.c49 .enable_mask = BIT(0),
80 .enable_mask = BIT(3),
111 .enable_mask = BIT(4),
128 .enable_mask = BIT(6),
167 .enable_mask = BIT(7),
184 .enable_mask = BIT(8),
1056 .enable_mask = BIT(0),
1074 .enable_mask = BIT(0),
1092 .enable_mask = BIT(0),
1112 .enable_mask = BIT(0),
[all …]
A Dgcc-msm8917.c58 .enable_mask = BIT(23),
76 .enable_mask = BIT(0),
150 .enable_mask = BIT(5),
195 .enable_mask = BIT(7),
1212 .enable_mask = BIT(1),
1225 .enable_mask = BIT(0),
1238 .enable_mask = BIT(0),
1277 .enable_mask = BIT(0),
1295 .enable_mask = BIT(0),
1313 .enable_mask = BIT(0),
[all …]
A Dgcc-msm8976.c75 .enable_mask = BIT(0),
108 .enable_mask = BIT(2),
145 .enable_mask = BIT(4),
192 .enable_mask = BIT(5),
223 .enable_mask = BIT(7),
1658 .enable_mask = BIT(0),
1675 .enable_mask = BIT(0),
1693 .enable_mask = BIT(0),
1711 .enable_mask = BIT(0),
1729 .enable_mask = BIT(0),
[all …]
A Dgcc-sm8550.c60 .enable_mask = BIT(0),
99 .enable_mask = BIT(4),
116 .enable_mask = BIT(7),
133 .enable_mask = BIT(9),
1233 .enable_mask = BIT(0),
1253 .enable_mask = BIT(1),
1273 .enable_mask = BIT(0),
1308 .enable_mask = BIT(0),
1323 .enable_mask = BIT(0),
1353 .enable_mask = BIT(0),
[all …]
A Dgcc-qcs8300.c64 .enable_mask = BIT(0),
103 .enable_mask = BIT(1),
120 .enable_mask = BIT(4),
137 .enable_mask = BIT(7),
154 .enable_mask = BIT(9),
1364 .enable_mask = BIT(0),
1384 .enable_mask = BIT(0),
1404 .enable_mask = BIT(0),
1424 .enable_mask = BIT(0),
1439 .enable_mask = BIT(0),
[all …]
A Dgcc-ipq5018.c66 .enable_mask = BIT(0),
81 .enable_mask = BIT(2),
96 .enable_mask = BIT(5),
111 .enable_mask = BIT(6),
1338 .enable_mask = BIT(1),
1352 .enable_mask = BIT(1),
1367 .enable_mask = BIT(0),
1384 .enable_mask = BIT(0),
1419 .enable_mask = BIT(0),
1436 .enable_mask = BIT(0),
[all …]
A Dgcc-sa8775p.c78 .enable_mask = BIT(0),
115 .enable_mask = BIT(1),
130 .enable_mask = BIT(4),
145 .enable_mask = BIT(5),
160 .enable_mask = BIT(7),
175 .enable_mask = BIT(9),
1705 .enable_mask = BIT(0),
1725 .enable_mask = BIT(0),
1745 .enable_mask = BIT(0),
1765 .enable_mask = BIT(0),
[all …]
/drivers/regulator/
A D88pm886-regulator.c67 .enable_mask = BIT(0),
80 .enable_mask = BIT(1),
93 .enable_mask = BIT(2),
106 .enable_mask = BIT(3),
119 .enable_mask = BIT(4),
132 .enable_mask = BIT(5),
145 .enable_mask = BIT(6),
158 .enable_mask = BIT(7),
171 .enable_mask = BIT(0),
184 .enable_mask = BIT(1),
[all …]

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