| /drivers/gpu/drm/amd/pm/swsmu/ |
| A D | smu_internal.h | 90 #define smu_gfx_ulv_control(smu, enablement) smu_ppt_funcs(gfx_ulv_control, 0, smu, enablement) argument
91 #define smu_deep_sleep_control(smu, enablement) smu_ppt_funcs(deep_sleep_control, 0, smu, enable… argument
94 #define smu_gpo_control(smu, enablement) smu_ppt_funcs(gpo_control, 0, smu, enablement) argument
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| /drivers/gpu/drm/amd/pm/swsmu/smu14/ |
| A D | smu_v14_0.c | 1641 bool enablement) in smu_v14_0_gpo_control() argument
1647 enablement ? 1 : 0, in smu_v14_0_gpo_control()
1650 dev_err(smu->adev->dev, "SetGpoAllow %d failed!\n", enablement); in smu_v14_0_gpo_control()
1656 bool enablement) in smu_v14_0_deep_sleep_control() argument
1662 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_GFXCLK_BIT, enablement); in smu_v14_0_deep_sleep_control()
1670 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_UCLK_BIT, enablement); in smu_v14_0_deep_sleep_control()
1678 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_FCLK_BIT, enablement); in smu_v14_0_deep_sleep_control()
1694 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_LCLK_BIT, enablement); in smu_v14_0_deep_sleep_control()
1702 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_VCN_BIT, enablement); in smu_v14_0_deep_sleep_control()
1729 bool enablement) in smu_v14_0_gfx_ulv_control() argument
[all …]
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| /drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| A D | smu_v13_0.c | 2034 bool enablement) in smu_v13_0_gpo_control() argument
2040 enablement ? 1 : 0, in smu_v13_0_gpo_control()
2043 dev_err(smu->adev->dev, "SetGpoAllow %d failed!\n", enablement); in smu_v13_0_gpo_control()
2049 bool enablement) in smu_v13_0_deep_sleep_control() argument
2055 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_GFXCLK_BIT, enablement); in smu_v13_0_deep_sleep_control()
2063 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_UCLK_BIT, enablement); in smu_v13_0_deep_sleep_control()
2071 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_FCLK_BIT, enablement); in smu_v13_0_deep_sleep_control()
2087 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_LCLK_BIT, enablement); in smu_v13_0_deep_sleep_control()
2095 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_VCN_BIT, enablement); in smu_v13_0_deep_sleep_control()
2122 bool enablement) in smu_v13_0_gfx_ulv_control() argument
[all …]
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| /drivers/gpu/drm/amd/pm/swsmu/inc/ |
| A D | smu_v14_0.h | 207 bool enablement);
224 bool enablement);
227 bool enablement);
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| A D | smu_v13_0.h | 244 bool enablement);
261 bool enablement);
264 bool enablement);
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| A D | smu_v11_0.h | 293 bool enablement);
296 bool enablement);
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| A D | amdgpu_smu.h | 1325 int (*gfx_ulv_control)(struct smu_context *smu, bool enablement);
1330 int (*deep_sleep_control)(struct smu_context *smu, bool enablement);
1352 int (*gpo_control)(struct smu_context *smu, bool enablement);
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| /drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| A D | smu_v11_0.c | 2103 bool enablement) in smu_v11_0_gfx_ulv_control() argument
2108 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_GFX_ULV_BIT, enablement); in smu_v11_0_gfx_ulv_control()
2114 bool enablement) in smu_v11_0_deep_sleep_control() argument
2120 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_GFXCLK_BIT, enablement); in smu_v11_0_deep_sleep_control()
2128 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_UCLK_BIT, enablement); in smu_v11_0_deep_sleep_control()
2130 dev_err(adev->dev, "Failed to %s UCLK DS!\n", enablement ? "enable" : "disable"); in smu_v11_0_deep_sleep_control()
2136 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_FCLK_BIT, enablement); in smu_v11_0_deep_sleep_control()
2138 dev_err(adev->dev, "Failed to %s FCLK DS!\n", enablement ? "enable" : "disable"); in smu_v11_0_deep_sleep_control()
2144 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_SOCCLK_BIT, enablement); in smu_v11_0_deep_sleep_control()
2152 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_LCLK_BIT, enablement); in smu_v11_0_deep_sleep_control()
[all …]
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| A D | sienna_cichlid_ppt.c | 2913 bool enablement) in sienna_cichlid_gpo_control() argument
2920 if (enablement) { in sienna_cichlid_gpo_control()
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| /drivers/gpu/drm/xe/ |
| A D | Kconfig.profile | 52 Configures the enablement of limitation on scheduler timeout
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| /drivers/iommu/arm/ |
| A D | Kconfig | 50 prefetch enablement are not applicable on the platform.
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| /drivers/char/tpm/ |
| A D | Kconfig | 18 userspace enablement piece of the specification, can be
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