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Searched refs:enetc_wr (Results 1 – 7 of 7) sorted by relevance

/drivers/net/ethernet/freescale/enetc/
A Denetc_msg.c10 enetc_wr(hw, ENETC_PSIIER, psiier & ~ENETC_PSIIER_MR_MASK); in enetc_msg_disable_mr_int()
17 enetc_wr(hw, ENETC_PSIIER, psiier | ENETC_PSIIER_MR_MASK); in enetc_msg_enable_mr_int()
42 enetc_wr(hw, ENETC_PSIIDR, ENETC_PSIIER_MR_MASK); in enetc_msg_task()
58 enetc_wr(hw, ENETC_PSIMSGRR, psimsgrr); in enetc_msg_task()
86 enetc_wr(hw, ENETC_PSIVMSGRCVAR0(idx), val); in enetc_msg_alloc_mbx()
88 enetc_wr(hw, ENETC_PSIVMSGRCVAR1(idx), val); in enetc_msg_alloc_mbx()
103 enetc_wr(hw, ENETC_PSIVMSGRCVAR0(idx), 0); in enetc_msg_free_mbx()
104 enetc_wr(hw, ENETC_PSIVMSGRCVAR1(idx), 0); in enetc_msg_free_mbx()
124 enetc_wr(&si->hw, ENETC_SIMSIVR, ENETC_SI_INT_IDX); in enetc_msg_psi_init()
A Denetc_cbdr.c33 enetc_wr(hw, ENETC_SICAR2, in enetc_setup_cbdr()
36 enetc_wr(hw, ENETC_SICBDRBAR0, lower_32_bits(cbdr->bd_dma_base)); in enetc_setup_cbdr()
37 enetc_wr(hw, ENETC_SICBDRBAR1, upper_32_bits(cbdr->bd_dma_base)); in enetc_setup_cbdr()
38 enetc_wr(hw, ENETC_SICBDRLENR, ENETC_RTBLENR_LEN(cbdr->bd_count)); in enetc_setup_cbdr()
78 enetc_wr(hw, ENETC_SICAR2, in enetc4_setup_cbdr()
A Denetc_vf.c16 enetc_wr(hw, ENETC_VSIMSGSNDAR1, upper_32_bits(msg->dma)); in enetc_msg_vsi_write_msg()
17 enetc_wr(hw, ENETC_VSIMSGSNDAR0, val); in enetc_msg_vsi_write_msg()
A Denetc.h635 enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) | in enetc_psfp_enable()
651 enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) & in enetc_psfp_disable()
A Denetc.c2425 enetc_wr(hw, ENETC4_SILSOSFMR0, in enetc_set_lso_flags_mask()
2428 enetc_wr(hw, ENETC4_SILSOSFMR1, 0); in enetc_set_lso_flags_mask()
2437 enetc_wr(hw, ENETC_SIRBGCR, priv->num_rx_rings); in enetc_set_rss()
2442 enetc_wr(hw, ENETC_SIMR, reg); in enetc_set_rss()
2452 enetc_wr(hw, ENETC_SICAR0, in enetc_configure_si()
2454 enetc_wr(hw, ENETC_SICAR1, ENETC_SICAR_MSI); in enetc_configure_si()
2456 enetc_wr(hw, ENETC_SIMR, ENETC_SIMR_EN); in enetc_configure_si()
2732 enetc_wr(hw, ENETC_SIMSIRRV(i), entry); in enetc_setup_irqs()
2737 enetc_wr(hw, ENETC_SIMSITRV(idx), entry); in enetc_setup_irqs()
A Denetc_hw.h532 #define enetc_wr(hw, off, val) enetc_wr_reg((hw)->reg + (off), val) macro
550 enetc_wr(hw, ENETC_BDR(t, n, off), val)
A Denetc_qos.c113 enetc_wr(hw, ENETC_PTGCR, tge | ENETC_PTGCR_TGE); in enetc_setup_taprio()
117 enetc_wr(hw, ENETC_PTGCR, tge & ~ENETC_PTGCR_TGE); in enetc_setup_taprio()
144 enetc_wr(hw, ENETC_PTGCR, val & ~ENETC_PTGCR_TGE); in enetc_reset_taprio()

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