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Searched refs:eng_id (Results 1 – 25 of 62) sorted by relevance

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/drivers/gpu/drm/amd/display/dc/core/
A Ddc_link_enc_cfg.c70 enum engine_id eng_id) in get_stream_using_link_enc() argument
78 if ((assignment.valid == true) && (assignment.eng_id == eng_id)) { in get_stream_using_link_enc()
90 enum engine_id eng_id) in remove_link_enc_assignment() argument
143 .eng_id = eng_id, in add_link_enc_assignment()
171 return eng_id; in find_first_avail_link_enc()
183 return eng_id; in find_first_avail_link_enc()
319 eng_id = stream->link->eng_id; in link_enc_cfg_link_encs_assign()
472 if ((assignment.valid == true) && (assignment.eng_id == eng_id)) { in link_enc_cfg_get_stream_using_link_enc()
536 encs_assigned[assignment.eng_id - ENGINE_ID_DIGA] = assignment.eng_id; in link_enc_cfg_get_next_avail_link_enc()
677 assignment_i.eng_id != assignment_j.eng_id) { in link_enc_cfg_validate()
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/drivers/gpu/drm/amd/display/dc/inc/
A Dlink_enc_cfg.h84 enum engine_id eng_id);
89 enum engine_id eng_id);
108 bool link_enc_cfg_is_link_enc_avail(struct dc *dc, enum engine_id eng_id, struct dc_link *link);
A Dresource.h84 enum engine_id eng_id, struct dc_context *ctx);
87 enum engine_id eng_id, struct dc_context *ctx);
/drivers/gpu/drm/amd/display/dc/resource/dcn316/
A Ddcn316_resource.c1122 &link_enc_regs[eng_id - ENGINE_ID_DIGA], in dcn31_link_enc_create_minimal()
1123 eng_id); in dcn31_link_enc_create_minimal()
1213 enum engine_id eng_id, in dcn316_stream_encoder_create() argument
1223 if (eng_id <= ENGINE_ID_DIGF) { in dcn316_stream_encoder_create()
1224 vpg_inst = eng_id; in dcn316_stream_encoder_create()
1225 afmt_inst = eng_id; in dcn316_stream_encoder_create()
1241 eng_id, vpg, afmt, in dcn316_stream_encoder_create()
1242 &stream_enc_regs[eng_id], in dcn316_stream_encoder_create()
1250 enum engine_id eng_id, in dcn31_hpo_dp_stream_encoder_create() argument
1260 ASSERT((eng_id >= ENGINE_ID_HPO_DP_0) && (eng_id <= ENGINE_ID_HPO_DP_3)); in dcn31_hpo_dp_stream_encoder_create()
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/drivers/gpu/drm/amd/display/dc/resource/dcn314/
A Ddcn314_resource.c1187 &link_enc_regs[eng_id - ENGINE_ID_DIGA], in dcn31_link_enc_create_minimal()
1188 eng_id); in dcn31_link_enc_create_minimal()
1276 enum engine_id eng_id, in dcn314_stream_encoder_create() argument
1286 if (eng_id < ENGINE_ID_DIGF) { in dcn314_stream_encoder_create()
1287 vpg_inst = eng_id; in dcn314_stream_encoder_create()
1288 afmt_inst = eng_id; in dcn314_stream_encoder_create()
1304 eng_id, vpg, afmt, in dcn314_stream_encoder_create()
1305 &stream_enc_regs[eng_id], in dcn314_stream_encoder_create()
1312 enum engine_id eng_id, in dcn31_hpo_dp_stream_encoder_create() argument
1322 ASSERT((eng_id >= ENGINE_ID_HPO_DP_0) && (eng_id <= ENGINE_ID_HPO_DP_3)); in dcn31_hpo_dp_stream_encoder_create()
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/drivers/crypto/
A Dsa2ul.c729 if (ad->auth_eng.eng_id) { in sa_init_sc()
731 first_engine = ad->enc_eng.eng_id; in sa_init_sc()
733 first_engine = ad->auth_eng.eng_id; in sa_init_sc()
742 } else if (ad->enc_eng.eng_id && !ad->auth_eng.eng_id) { in sa_init_sc()
744 first_engine = ad->enc_eng.eng_id; in sa_init_sc()
898 ad->enc_eng.eng_id = SA_ENG_ID_EM1; in sa_cipher_setkey()
902 cfg.enc_eng_id = ad->enc_eng.eng_id; in sa_cipher_setkey()
930 cfg.enc_eng_id = ad->enc_eng.eng_id; in sa_cipher_setkey()
1450 ad->auth_eng.eng_id = SA_ENG_ID_AM1; in sa_sha_setup()
1456 cfg.enc_eng_id = ad->enc_eng.eng_id; in sa_sha_setup()
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/drivers/gpu/drm/amd/display/dc/resource/dcn31/
A Ddcn31_resource.c1130 &link_enc_regs[eng_id - ENGINE_ID_DIGA], in dcn31_link_enc_create_minimal()
1131 eng_id); in dcn31_link_enc_create_minimal()
1219 enum engine_id eng_id, in dcn31_stream_encoder_create() argument
1229 if (eng_id <= ENGINE_ID_DIGF) { in dcn31_stream_encoder_create()
1230 vpg_inst = eng_id; in dcn31_stream_encoder_create()
1231 afmt_inst = eng_id; in dcn31_stream_encoder_create()
1247 eng_id, vpg, afmt, in dcn31_stream_encoder_create()
1248 &stream_enc_regs[eng_id], in dcn31_stream_encoder_create()
1255 enum engine_id eng_id, in dcn31_hpo_dp_stream_encoder_create() argument
1265 ASSERT((eng_id >= ENGINE_ID_HPO_DP_0) && (eng_id <= ENGINE_ID_HPO_DP_3)); in dcn31_hpo_dp_stream_encoder_create()
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/drivers/gpu/drm/amd/display/dc/resource/dcn35/
A Ddcn35_resource.c1135 &link_enc_regs[eng_id - ENGINE_ID_DIGA], in dcn31_link_enc_create_minimal()
1136 eng_id); in dcn31_link_enc_create_minimal()
1264 enum engine_id eng_id, in dcn35_stream_encoder_create() argument
1274 if (eng_id <= ENGINE_ID_DIGF) { in dcn35_stream_encoder_create()
1275 vpg_inst = eng_id; in dcn35_stream_encoder_create()
1276 afmt_inst = eng_id; in dcn35_stream_encoder_create()
1300 eng_id, vpg, afmt, in dcn35_stream_encoder_create()
1301 &stream_enc_regs[eng_id], in dcn35_stream_encoder_create()
1308 enum engine_id eng_id, in dcn31_hpo_dp_stream_encoder_create() argument
1318 ASSERT((eng_id >= ENGINE_ID_HPO_DP_0) && (eng_id <= ENGINE_ID_HPO_DP_3)); in dcn31_hpo_dp_stream_encoder_create()
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/drivers/gpu/drm/amd/display/dc/resource/dcn315/
A Ddcn315_resource.c1128 &link_enc_regs[eng_id - ENGINE_ID_DIGA], in dcn31_link_enc_create_minimal()
1129 eng_id); in dcn31_link_enc_create_minimal()
1217 enum engine_id eng_id, in dcn315_stream_encoder_create() argument
1229 if (eng_id <= ENGINE_ID_DIGF) { in dcn315_stream_encoder_create()
1230 vpg_inst = eng_id; in dcn315_stream_encoder_create()
1231 afmt_inst = eng_id; in dcn315_stream_encoder_create()
1247 eng_id, vpg, afmt, in dcn315_stream_encoder_create()
1248 &stream_enc_regs[eng_id], in dcn315_stream_encoder_create()
1255 enum engine_id eng_id, in dcn31_hpo_dp_stream_encoder_create() argument
1265 ASSERT((eng_id >= ENGINE_ID_HPO_DP_0) && (eng_id <= ENGINE_ID_HPO_DP_3)); in dcn31_hpo_dp_stream_encoder_create()
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/drivers/gpu/drm/amd/display/dc/resource/dcn351/
A Ddcn351_resource.c1115 &link_enc_regs[eng_id - ENGINE_ID_DIGA], in dcn31_link_enc_create_minimal()
1116 eng_id); in dcn31_link_enc_create_minimal()
1244 enum engine_id eng_id, in dcn35_stream_encoder_create() argument
1254 if (eng_id <= ENGINE_ID_DIGF) { in dcn35_stream_encoder_create()
1255 vpg_inst = eng_id; in dcn35_stream_encoder_create()
1256 afmt_inst = eng_id; in dcn35_stream_encoder_create()
1280 eng_id, vpg, afmt, in dcn35_stream_encoder_create()
1281 &stream_enc_regs[eng_id], in dcn35_stream_encoder_create()
1288 enum engine_id eng_id, in dcn31_hpo_dp_stream_encoder_create() argument
1298 ASSERT((eng_id >= ENGINE_ID_HPO_DP_0) && (eng_id <= ENGINE_ID_HPO_DP_3)); in dcn31_hpo_dp_stream_encoder_create()
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/drivers/gpu/drm/amd/display/dc/resource/dcn36/
A Ddcn36_resource.c1116 &link_enc_regs[eng_id - ENGINE_ID_DIGA], in dcn31_link_enc_create_minimal()
1117 eng_id); in dcn31_link_enc_create_minimal()
1245 enum engine_id eng_id, in dcn35_stream_encoder_create() argument
1255 if (eng_id <= ENGINE_ID_DIGF) { in dcn35_stream_encoder_create()
1256 vpg_inst = eng_id; in dcn35_stream_encoder_create()
1257 afmt_inst = eng_id; in dcn35_stream_encoder_create()
1281 eng_id, vpg, afmt, in dcn35_stream_encoder_create()
1282 &stream_enc_regs[eng_id], in dcn35_stream_encoder_create()
1289 enum engine_id eng_id, in dcn31_hpo_dp_stream_encoder_create() argument
1299 ASSERT((eng_id >= ENGINE_ID_HPO_DP_0) && (eng_id <= ENGINE_ID_HPO_DP_3)); in dcn31_hpo_dp_stream_encoder_create()
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/drivers/gpu/drm/amd/display/dc/link/
A Dlink_factory.c394 if (link->link_id.id != CONNECTOR_ID_VIRTUAL && link->eng_id != ENGINE_ID_UNKNOWN) { in link_destruct()
395 link->dc->res_pool->link_encoders[link->eng_id - ENGINE_ID_DIGA] = NULL; in link_destruct()
636 link->eng_id = link->link_enc->preferred_engine; in construct_phy()
637 link->dc->res_pool->link_encoders[link->eng_id - ENGINE_ID_DIGA] = link->link_enc; in construct_phy()
647 panel_cntl_init_data.eng_id = link->eng_id; in construct_phy()
/drivers/gpu/drm/amd/display/dc/dcn31/
A Ddcn31_panel_cntl.c180 switch (init_data->eng_id) { in dcn31_panel_cntl_construct()
188 DC_LOG_WARNING("Unsupported pwrseq engine id: %d!\n", init_data->eng_id); in dcn31_panel_cntl_construct()
/drivers/gpu/drm/amd/display/dc/resource/dcn321/
A Ddcn321_resource.c1182 enum engine_id eng_id, in dcn321_stream_encoder_create() argument
1192 if (eng_id <= ENGINE_ID_DIGF) { in dcn321_stream_encoder_create()
1193 vpg_inst = eng_id; in dcn321_stream_encoder_create()
1194 afmt_inst = eng_id; in dcn321_stream_encoder_create()
1218 eng_id, vpg, afmt, in dcn321_stream_encoder_create()
1219 &stream_enc_regs[eng_id], in dcn321_stream_encoder_create()
1226 enum engine_id eng_id, in dcn321_hpo_dp_stream_encoder_create() argument
1236 ASSERT((eng_id >= ENGINE_ID_HPO_DP_0) && (eng_id <= ENGINE_ID_HPO_DP_3)); in dcn321_hpo_dp_stream_encoder_create()
1237 hpo_dp_inst = eng_id - ENGINE_ID_HPO_DP_0; in dcn321_hpo_dp_stream_encoder_create()
1275 hpo_dp_inst, eng_id, vpg, apg, in dcn321_hpo_dp_stream_encoder_create()
/drivers/gpu/drm/amd/display/dc/inc/hw/
A Dpanel_cntl.h60 uint32_t eng_id; member
/drivers/gpu/drm/amd/display/dc/dio/dcn20/
A Ddcn20_stream_encoder.c647 enum engine_id eng_id, in dcn20_stream_encoder_construct() argument
654 enc1->base.id = eng_id; in dcn20_stream_encoder_construct()
659 enc1->base.stream_enc_inst = eng_id - ENGINE_ID_DIGA; in dcn20_stream_encoder_construct()
/drivers/gpu/drm/amd/display/dc/resource/dcn401/
A Ddcn401_resource.c1173 enum engine_id eng_id, in dcn401_stream_encoder_create() argument
1183 if (eng_id <= ENGINE_ID_DIGF) { in dcn401_stream_encoder_create()
1184 vpg_inst = eng_id; in dcn401_stream_encoder_create()
1185 afmt_inst = eng_id; in dcn401_stream_encoder_create()
1193 if (!enc1 || !vpg || !afmt || eng_id >= ARRAY_SIZE(stream_enc_regs)) { in dcn401_stream_encoder_create()
1208 eng_id, vpg, afmt, in dcn401_stream_encoder_create()
1209 &stream_enc_regs[eng_id], in dcn401_stream_encoder_create()
1215 enum engine_id eng_id, in dcn401_hpo_dp_stream_encoder_create() argument
1225 ASSERT((eng_id >= ENGINE_ID_HPO_DP_0) && (eng_id <= ENGINE_ID_HPO_DP_3)); in dcn401_hpo_dp_stream_encoder_create()
1226 hpo_dp_inst = eng_id - ENGINE_ID_HPO_DP_0; in dcn401_hpo_dp_stream_encoder_create()
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/drivers/net/phy/mscc/
A Dmscc_ptp.c970 u8 eng_id = base ? 0 : 1; in vsc85xx_ts_engine_init() local
978 val &= ~(PTP_ANALYZER_MODE_EGR_ENA(BIT(eng_id)) | in vsc85xx_ts_engine_init()
979 PTP_ANALYZER_MODE_INGR_ENA(BIT(eng_id))); in vsc85xx_ts_engine_init()
1016 val &= ~PTP_ANALYZER_MODE_EGR_ENA(BIT(eng_id)); in vsc85xx_ts_engine_init()
1018 val |= PTP_ANALYZER_MODE_EGR_ENA(BIT(eng_id)); in vsc85xx_ts_engine_init()
1020 val &= ~PTP_ANALYZER_MODE_INGR_ENA(BIT(eng_id)); in vsc85xx_ts_engine_init()
1022 val |= PTP_ANALYZER_MODE_INGR_ENA(BIT(eng_id)); in vsc85xx_ts_engine_init()
/drivers/gpu/drm/amd/display/dc/resource/dcn301/
A Ddcn301_resource.c982 static struct stream_encoder *dcn301_stream_encoder_create(enum engine_id eng_id, in dcn301_stream_encoder_create() argument
992 if (eng_id <= ENGINE_ID_DIGF) { in dcn301_stream_encoder_create()
993 vpg_inst = eng_id; in dcn301_stream_encoder_create()
994 afmt_inst = eng_id; in dcn301_stream_encoder_create()
1002 if (!enc1 || !vpg || !afmt || eng_id >= ARRAY_SIZE(stream_enc_regs)) { in dcn301_stream_encoder_create()
1010 eng_id, vpg, afmt, in dcn301_stream_encoder_create()
1011 &stream_enc_regs[eng_id], in dcn301_stream_encoder_create()
/drivers/gpu/drm/amd/display/dc/resource/dcn302/
A Ddcn302_resource.c390 static struct stream_encoder *dcn302_stream_encoder_create(enum engine_id eng_id, struct dc_context… in dcn302_stream_encoder_create() argument
399 if (eng_id <= ENGINE_ID_DIGE) { in dcn302_stream_encoder_create()
400 vpg_inst = eng_id; in dcn302_stream_encoder_create()
401 afmt_inst = eng_id; in dcn302_stream_encoder_create()
416 …_dio_stream_encoder_construct(enc1, ctx, ctx->dc_bios, eng_id, vpg, afmt, &stream_enc_regs[eng_id], in dcn302_stream_encoder_create()
/drivers/gpu/drm/amd/display/dc/resource/dcn303/
A Ddcn303_resource.c378 static struct stream_encoder *dcn303_stream_encoder_create(enum engine_id eng_id, struct dc_context… in dcn303_stream_encoder_create() argument
387 if (eng_id <= ENGINE_ID_DIGB) { in dcn303_stream_encoder_create()
388 vpg_inst = eng_id; in dcn303_stream_encoder_create()
389 afmt_inst = eng_id; in dcn303_stream_encoder_create()
404 …_dio_stream_encoder_construct(enc1, ctx, ctx->dc_bios, eng_id, vpg, afmt, &stream_enc_regs[eng_id], in dcn303_stream_encoder_create()
/drivers/gpu/drm/amd/display/dc/resource/dcn32/
A Ddcn32_resource.c1200 enum engine_id eng_id, in dcn32_stream_encoder_create() argument
1210 if (eng_id <= ENGINE_ID_DIGF) { in dcn32_stream_encoder_create()
1211 vpg_inst = eng_id; in dcn32_stream_encoder_create()
1212 afmt_inst = eng_id; in dcn32_stream_encoder_create()
1236 eng_id, vpg, afmt, in dcn32_stream_encoder_create()
1237 &stream_enc_regs[eng_id], in dcn32_stream_encoder_create()
1244 enum engine_id eng_id, in dcn32_hpo_dp_stream_encoder_create() argument
1254 ASSERT((eng_id >= ENGINE_ID_HPO_DP_0) && (eng_id <= ENGINE_ID_HPO_DP_3)); in dcn32_hpo_dp_stream_encoder_create()
1255 hpo_dp_inst = eng_id - ENGINE_ID_HPO_DP_0; in dcn32_hpo_dp_stream_encoder_create()
1293 hpo_dp_inst, eng_id, vpg, apg, in dcn32_hpo_dp_stream_encoder_create()
/drivers/gpu/drm/amd/display/dc/dio/dcn314/
A Ddcn314_dio_stream_encoder.c488 enum engine_id eng_id, in dcn314_dio_stream_encoder_construct() argument
497 enc1->base.id = eng_id; in dcn314_dio_stream_encoder_construct()
/drivers/gpu/drm/amd/display/dc/dio/dcn35/
A Ddcn35_dio_stream_encoder.c502 enum engine_id eng_id, in dcn35_dio_stream_encoder_construct() argument
511 enc1->base.id = eng_id; in dcn35_dio_stream_encoder_construct()
/drivers/gpu/drm/amd/display/dc/dio/dcn32/
A Ddcn32_dio_stream_encoder.c475 enum engine_id eng_id, in dcn32_dio_stream_encoder_construct() argument
484 enc1->base.id = eng_id; in dcn32_dio_stream_encoder_construct()

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