| /drivers/gpu/drm/i915/gt/ |
| A D | selftest_rc6.c | 194 struct intel_engine_cs *engine, **engines; in randomised_engines() local 204 engines = kmalloc_array(n, sizeof(*engines), GFP_KERNEL); in randomised_engines() 205 if (!engines) in randomised_engines() 210 engines[n++] = engine; in randomised_engines() 212 i915_prandom_shuffle(engines, sizeof(*engines), n, prng); in randomised_engines() 215 return engines; in randomised_engines() 221 struct intel_engine_cs **engines; in live_rc6_ctx_wa() local 230 engines = randomised_engines(gt, &prng, &count); in live_rc6_ctx_wa() 231 if (!engines) in live_rc6_ctx_wa() 235 struct intel_engine_cs *engine = engines[n]; in live_rc6_ctx_wa() [all …]
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| A D | intel_engine_user.c | 82 struct list_head *engines) in sort_engines() argument 89 list_add(&engine->uabi_list, engines); in sort_engines() 91 list_sort(NULL, engines, engine_cmp); in sort_engines() 210 LIST_HEAD(engines); in intel_engines_driver_register() 212 sort_engines(i915, &engines); in intel_engines_driver_register() 216 list_for_each_safe(it, next, &engines) { in intel_engines_driver_register()
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| A D | intel_engine.h | 315 intel_engine_create_parallel(struct intel_engine_cs **engines, in intel_engine_create_parallel() argument 319 GEM_BUG_ON(!engines[0]->cops->create_parallel); in intel_engine_create_parallel() 320 return engines[0]->cops->create_parallel(engines, num_engines, width); in intel_engine_create_parallel()
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| A D | intel_gt_engines_debugfs.c | 27 DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(engines);
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| /drivers/gpu/drm/i915/gem/ |
| A D | i915_gem_context.c | 763 set.engines = kmalloc_array(set.num_engines, sizeof(*set.engines), GFP_KERNEL); in set_proto_ctx_engines() 764 if (!set.engines) in set_proto_ctx_engines() 772 kfree(set.engines); in set_proto_ctx_engines() 776 memset(&set.engines[n], 0, sizeof(set.engines[n])); in set_proto_ctx_engines() 789 kfree(set.engines); in set_proto_ctx_engines() 804 kfree(set.engines); in set_proto_ctx_engines() 1032 if (!e->engines[count]) in __free_engines() 1051 free_engines(engines); in free_engines_rcu() 1086 list_del(&engines->link); in engines_notify() 1241 e->engines[n] = ce; in user_engines() [all …]
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| A D | i915_gem_context.h | 185 return rcu_dereference_protected(ctx->engines, in i915_gem_context_engines() 210 struct i915_gem_engines *e = rcu_dereference(ctx->engines); in i915_gem_context_get_engine() 213 else if (likely(idx < e->num_engines && e->engines[idx])) in i915_gem_context_get_engine() 214 ce = intel_context_get(e->engines[idx]); in i915_gem_context_get_engine() 224 struct i915_gem_engines *engines) in i915_gem_engines_iter_init() argument 226 it->engines = engines; in i915_gem_engines_iter_init() 233 #define for_each_gem_engine(ce, engines, it) \ argument 234 for (i915_gem_engines_iter_init(&(it), (engines)); \
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| A D | i915_gem_context_types.h | 54 struct intel_context *engines[]; member 65 const struct i915_gem_engines *engines; member 255 struct i915_gem_engines __rcu *engines; member 418 struct list_head engines; member
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| /drivers/gpu/drm/xe/ |
| A D | xe_query.c | 191 struct drm_xe_query_engines *engines; in query_engines() local 205 engines = kzalloc(size, GFP_KERNEL); in query_engines() 206 if (!engines) in query_engines() 214 engines->engines[i].instance.engine_class = in query_engines() 216 engines->engines[i].instance.engine_instance = in query_engines() 218 engines->engines[i].instance.gt_id = gt->info.id; in query_engines() 223 engines->num_engines = i; in query_engines() 225 if (copy_to_user(query_ptr, engines, size)) { in query_engines() 226 kfree(engines); in query_engines() 229 kfree(engines); in query_engines()
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| /drivers/gpu/drm/i915/gt/uc/ |
| A D | selftest_guc_multi_lrc.c | 13 static void logical_sort(struct intel_engine_cs **engines, int num_engines) in logical_sort() argument 20 if (engines[j]->logical_mask & BIT(i)) { in logical_sort() 21 sorted[i] = engines[j]; in logical_sort() 26 memcpy(*engines, *sorted, in logical_sort()
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| /drivers/crypto/marvell/cesa/ |
| A D | cesa.c | 377 struct mv_cesa_engine *engine = &cesa->engines[idx]; in mv_cesa_get_sram() 409 struct mv_cesa_engine *engine = &cesa->engines[idx]; in mv_cesa_put_sram() 426 struct mv_cesa_engine *engines; in mv_cesa_probe() local 457 cesa->engines = devm_kcalloc(dev, caps->nengines, sizeof(*engines), in mv_cesa_probe() 459 if (!cesa->engines) in mv_cesa_probe() 477 struct mv_cesa_engine *engine = &cesa->engines[i]; in mv_cesa_probe()
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| /drivers/gpu/drm/omapdrm/ |
| A D | omap_dmm_tiler.c | 290 if (dmm->engines[i].async) in omap_dmm_irq_handler() 291 release_engine(&dmm->engines[i]); in omap_dmm_irq_handler() 293 complete(&dmm->engines[i].compl); in omap_dmm_irq_handler() 751 kfree(omap_dmm->engines); in omap_dmm_remove() 886 omap_dmm->engines = kcalloc(omap_dmm->num_engines, in omap_dmm_probe() 887 sizeof(*omap_dmm->engines), GFP_KERNEL); in omap_dmm_probe() 888 if (!omap_dmm->engines) { in omap_dmm_probe() 894 omap_dmm->engines[i].id = i; in omap_dmm_probe() 895 omap_dmm->engines[i].dmm = omap_dmm; in omap_dmm_probe() 896 omap_dmm->engines[i].refill_va = omap_dmm->refill_va + in omap_dmm_probe() [all …]
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| /drivers/gpu/drm/nouveau/nvif/ |
| A D | fifo.c | 64 device->runlist[i].engines = a->v.runlist[i].data; in nvif_fifo_runlists() 82 if (device->runlist[i].engines & engine) in nvif_fifo_runlist()
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| /drivers/gpu/drm/i915/gem/selftests/ |
| A D | mock_context.c | 32 INIT_LIST_HEAD(&ctx->stale.engines); in mock_context() 52 RCU_INIT_POINTER(ctx->engines, e); in mock_context()
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| A D | huge_pages.c | 1195 struct i915_gem_engines *engines; in igt_write_huge() local 1263 engines = i915_gem_context_lock_engines(ctx); in igt_write_huge() 1270 ce = engines->engines[order[i] % engines->num_engines]; in igt_write_huge() 1616 struct i915_gem_engines *engines; in igt_ppgtt_mixed() local 1714 engines = i915_gem_context_lock_engines(ctx); in igt_ppgtt_mixed() 1720 ce = engines->engines[order[i] % engines->num_engines]; in igt_ppgtt_mixed()
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| /drivers/gpu/drm/i915/ |
| A D | Kconfig.profile | 45 The driver sends a periodic heartbeat down all active engines to 70 certain platforms and certain engines which will be reflected in the 74 int "Preempt timeout for compute engines (ms, jiffy granularity)" 89 certain platforms and certain engines which will be reflected in the
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| /drivers/dma/idxd/ |
| A D | device.c | 674 engine = idxd->engines[i]; in idxd_engines_clear_state() 864 iowrite64(group->grpcfg.engines, idxd->reg_base + grpcfg_offset); in idxd_group_config_write() 1042 int i, engines = 0; in idxd_engines_setup() local 1048 group->grpcfg.engines = 0; in idxd_engines_setup() 1052 eng = idxd->engines[i]; in idxd_engines_setup() 1058 group->grpcfg.engines |= BIT(eng->id); in idxd_engines_setup() 1059 engines++; in idxd_engines_setup() 1062 if (!engines) in idxd_engines_setup() 1204 grpcfg_offset, group->grpcfg.engines); in idxd_group_load_config() 1211 if (group->grpcfg.engines & BIT(i)) { in idxd_group_load_config() [all …]
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| A D | init.c | 274 engine = idxd->engines[i]; in idxd_clean_engines() 279 kfree(idxd->engines); in idxd_clean_engines() 289 idxd->engines = kcalloc_node(idxd->max_engines, sizeof(struct idxd_engine *), in idxd_setup_engines() 291 if (!idxd->engines) in idxd_setup_engines() 316 idxd->engines[i] = engine; in idxd_setup_engines() 323 engine = idxd->engines[i]; in idxd_setup_engines() 328 kfree(idxd->engines); in idxd_setup_engines() 891 memcpy(saved_engine, idxd->engines[i], sizeof(*saved_engine)); in idxd_device_config_save() 984 engine = idxd->engines[i]; in idxd_device_config_restore()
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| A D | defaults.c | 46 engine = idxd->engines[0]; in idxd_load_iaa_device_defaults()
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| /drivers/gpu/drm/amd/display/dc/resource/dce60/ |
| A D | dce60_resource.c | 823 if (pool->base.engines[i] != NULL) in dce60_resource_destruct() 824 dce110_engine_destroy(&pool->base.engines[i]); in dce60_resource_destruct() 1077 pool->base.engines[i] = dce60_aux_engine_create(ctx, i); in dce60_construct() 1078 if (pool->base.engines[i] == NULL) { in dce60_construct() 1275 pool->base.engines[i] = dce60_aux_engine_create(ctx, i); in dce61_construct() 1276 if (pool->base.engines[i] == NULL) { in dce61_construct() 1472 pool->base.engines[i] = dce60_aux_engine_create(ctx, i); in dce64_construct() 1473 if (pool->base.engines[i] == NULL) { in dce64_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dce80/ |
| A D | dce80_resource.c | 829 if (pool->base.engines[i] != NULL) in dce80_resource_destruct() 830 dce110_engine_destroy(&pool->base.engines[i]); in dce80_resource_destruct() 1087 pool->base.engines[i] = dce80_aux_engine_create(ctx, i); in dce80_construct() 1088 if (pool->base.engines[i] == NULL) { in dce80_construct() 1287 pool->base.engines[i] = dce80_aux_engine_create(ctx, i); in dce81_construct() 1288 if (pool->base.engines[i] == NULL) { in dce81_construct() 1484 pool->base.engines[i] = dce80_aux_engine_create(ctx, i); in dce83_construct() 1485 if (pool->base.engines[i] == NULL) { in dce83_construct()
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| /drivers/gpu/drm/i915/selftests/ |
| A D | i915_request.c | 3193 struct p_thread *engines; in perf_parallel_engines() local 3196 engines = kcalloc(nengines, sizeof(*engines), GFP_KERNEL); in perf_parallel_engines() 3197 if (!engines) in perf_parallel_engines() 3220 memset(&engines[idx].p, 0, sizeof(engines[idx].p)); in perf_parallel_engines() 3229 engines[idx].worker = worker; in perf_parallel_engines() 3230 engines[idx].result = 0; in perf_parallel_engines() 3231 engines[idx].p.engine = engine; in perf_parallel_engines() 3232 engines[idx].engine = engine; in perf_parallel_engines() 3243 if (!engines[idx].worker) in perf_parallel_engines() 3246 kthread_flush_work(&engines[idx].work); in perf_parallel_engines() [all …]
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| /drivers/gpu/drm/nouveau/include/nvif/ |
| A D | device.h | 14 u64 engines; member
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| /drivers/hsi/ |
| A D | Kconfig | 10 application engines and cellular modems.
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_aux.c | 443 struct dce_aux *aux_engine = ddc->ctx->dc->res_pool->engines[ddc_pin->pin_data->en]; in dce_aux_configure_timeout() 577 aux_engine = ddc->ctx->dc->res_pool->engines[ddc_pin->pin_data->en]; in dce_aux_transfer_raw() 623 struct dce_aux *aux_engine = ddc->ctx->dc->res_pool->engines[ddc_pin->pin_data->en]; in dce_aux_transfer_dmub_raw() 716 aux_engine = ddc->ctx->dc->res_pool->engines[ddc_pin->pin_data->en]; in dce_aux_transfer_with_retries()
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| /drivers/leds/ |
| A D | leds-lp55xx-common.c | 547 chip->engines[idx - 1].mode = LP55XX_ENGINE_LOAD; in lp55xx_firmware_loaded() 653 enum lp55xx_engine_mode mode = chip->engines[nr - 1].mode; in lp55xx_show_engine_mode() 674 struct lp55xx_engine *engine = &chip->engines[nr - 1]; in lp55xx_store_engine_mode() 753 led_active = LED_ACTIVE(chip->engines[nr - 1].led_mux, i); in lp55xx_show_engine_leds() 765 struct lp55xx_engine *engine = &chip->engines[nr - 1]; in lp55xx_load_mux() 796 struct lp55xx_engine *engine = &chip->engines[nr - 1]; in lp55xx_store_engine_leds()
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