Home
last modified time | relevance | path

Searched refs:eq (Results 1 – 25 of 94) sorted by relevance

1234

/drivers/net/ethernet/huawei/hinic/
A Dhinic_hw_eqs.c49 ((eq)->virt_addr[(idx) / (eq)->num_elem_in_pg] + \
58 #define GET_CURR_AEQ_ELEM(eq) GET_AEQ_ELEM(eq, (eq)->cons_idx) argument
60 #define GET_CURR_CEQ_ELEM(eq) GET_CEQ_ELEM(eq, (eq)->cons_idx) argument
270 if (eq->cons_idx == eq->q_len) { in aeq_irq_handler()
272 eq->wrapped = !eq->wrapped; in aeq_irq_handler()
334 if (eq->cons_idx == eq->q_len) { in ceq_irq_handler()
336 eq->wrapped = !eq->wrapped; in ceq_irq_handler()
797 snprintf(eq->irq_name, sizeof(eq->irq_name), "hinic_aeq%d@pci:%s", eq->q_id, in init_eq()
801 snprintf(eq->irq_name, sizeof(eq->irq_name), "hinic_ceq%d@pci:%s", eq->q_id, in init_eq()
826 free_irq(eq->msix_entry.vector, eq); in remove_eq()
[all …]
/drivers/net/ethernet/mellanox/mlx5/core/
A Deq.c611 err = mlx5_eq_enable(dev, &eq->core, &eq->irq_nb); in setup_async_eq()
624 mlx5_eq_disable(dev, &eq->core, &eq->irq_nb); in cleanup_async_eq()
756 if (!eq) in mlx5_eq_create_generic()
766 return eq; in mlx5_eq_create_generic()
961 mlx5_eq_disable(dev, &eq->core, &eq->irq_nb); in destroy_comp_eq()
966 kfree(eq); in destroy_comp_eq()
1010 if (!eq) { in create_comp_eq()
1030 err = mlx5_eq_enable(dev, &eq->core, &eq->irq_nb); in create_comp_eq()
1045 mlx5_eq_disable(dev, &eq->core, &eq->irq_nb); in create_comp_eq()
1067 if (eq) { in mlx5_comp_eqn_get()
[all …]
A Dcq.c106 struct mlx5_eq_comp *eq; in mlx5_create_cq() local
109 eq = mlx5_eqn2comp_eq(dev, eqn); in mlx5_create_cq()
110 if (IS_ERR(eq)) in mlx5_create_cq()
111 return PTR_ERR(eq); in mlx5_create_cq()
122 cq->eq = eq; in mlx5_create_cq()
129 cq->tasklet_ctx.priv = &eq->tasklet_ctx; in mlx5_create_cq()
133 err = mlx5_eq_add_cq(&eq->core, cq); in mlx5_create_cq()
149 cq->irqn = eq->core.irqn; in mlx5_create_cq()
154 mlx5_eq_del_cq(&eq->core, cq); in mlx5_create_cq()
182 mlx5_eq_del_cq(&cq->eq->core, cq); in mlx5_core_destroy_cq()
A Ddebugfs.c383 static u64 eq_read_field(struct mlx5_core_dev *dev, struct mlx5_eq *eq, in eq_read_field() argument
398 MLX5_SET(query_eq_in, in, eq_number, eq->eqn); in eq_read_field()
565 int mlx5_debug_eq_add(struct mlx5_core_dev *dev, struct mlx5_eq *eq) in mlx5_debug_eq_add() argument
573 &eq->dbg, eq->eqn, eq_fields, in mlx5_debug_eq_add()
574 ARRAY_SIZE(eq_fields), eq); in mlx5_debug_eq_add()
576 eq->dbg = NULL; in mlx5_debug_eq_add()
581 void mlx5_debug_eq_remove(struct mlx5_core_dev *dev, struct mlx5_eq *eq) in mlx5_debug_eq_remove() argument
586 if (eq->dbg) in mlx5_debug_eq_remove()
587 rem_res_tree(eq->dbg); in mlx5_debug_eq_remove()
/drivers/infiniband/hw/erdma/
A Derdma_eq.c16 *eq->dbrec = db_data; in notify_eq()
24 u64 *eqe = get_queue_entry(eq->qbuf, eq->ci, eq->depth, EQE_SHIFT); in get_next_valid_eqe()
27 return owner ^ !!(eq->ci & eq->depth) ? eqe : NULL; in get_next_valid_eqe()
89 if (!eq->qbuf) in erdma_eq_common_init()
93 if (!eq->dbrec) in erdma_eq_common_init()
99 eq->ci = 0; in erdma_eq_common_init()
100 eq->depth = depth; in erdma_eq_common_init()
113 dma_pool_free(dev->db_pool, eq->dbrec, eq->dbrec_dma); in erdma_eq_destroy()
156 ceq_cb->eq.ci++; in erdma_ceq_completion_handler()
245 struct erdma_eq *eq = &dev->ceqs[ceqn].eq; in erdma_ceq_init_one() local
[all …]
A Derdma_cmdq.c160 struct erdma_eq *eq = &cmdq->eq; in erdma_cmdq_eq_init() local
163 ret = erdma_eq_common_init(dev, eq, cmdq->max_outstandings); in erdma_cmdq_eq_init()
167 eq->db = dev->func_bar + ERDMA_REGS_CEQ_DB_BASE_REG; in erdma_cmdq_eq_init()
170 upper_32_bits(eq->qbuf_dma_addr)); in erdma_cmdq_eq_init()
172 lower_32_bits(eq->qbuf_dma_addr)); in erdma_cmdq_eq_init()
173 erdma_reg_write32(dev, ERDMA_REGS_CMDQ_EQ_DEPTH_REG, eq->depth); in erdma_cmdq_eq_init()
174 erdma_reg_write64(dev, ERDMA_CMDQ_EQ_DB_HOST_ADDR_REG, eq->dbrec_dma); in erdma_cmdq_eq_init()
234 erdma_eq_destroy(dev, &cmdq->eq); in erdma_cmdq_destroy()
341 while (get_next_valid_eqe(&cmdq->eq)) { in erdma_cmdq_completion_handler()
342 cmdq->eq.ci++; in erdma_cmdq_completion_handler()
[all …]
A Derdma.h106 struct erdma_eq eq; member
166 struct erdma_eq eq; member
273 void notify_eq(struct erdma_eq *eq);
274 void *get_next_valid_eqe(struct erdma_eq *eq);
277 int erdma_eq_common_init(struct erdma_dev *dev, struct erdma_eq *eq, u32 depth);
278 void erdma_eq_destroy(struct erdma_dev *dev, struct erdma_eq *eq);
/drivers/infiniband/hw/mthca/
A Dmthca_eq.c184 mthca_write64(MTHCA_EQ_DB_SET_CI | eq->eqn, ci & (eq->nent - 1), in tavor_set_eq_ci()
237 eqe = get_eqe(eq, eq->cons_index); in next_eqe_sw()
363 ++eq->cons_index; in mthca_eq_int()
379 set_eq_ci(dev, eq, eq->cons_index); in mthca_eq_int()
424 tavor_set_eq_ci(dev, eq, eq->cons_index); in mthca_tavor_msi_x_interrupt()
458 arbel_set_eq_ci(dev, eq, eq->cons_index); in mthca_arbel_msi_x_interrupt()
478 eq->dev = dev; in mthca_create_eq()
482 eq->page_list = kmalloc_array(npages, sizeof(*eq->page_list), in mthca_create_eq()
523 &eq->mr); in mthca_create_eq()
554 eq->eqn_mask = swab32(1 << eq->eqn); in mthca_create_eq()
[all …]
/drivers/net/ethernet/mellanox/mlx4/
A Deq.c241 struct mlx4_eq *eq = &priv->eq_table.eq[vec]; in mlx4_set_eq_affinity_hint() local
543 eq->eqn, eq->cons_index, ret); in mlx4_eq_int()
573 eq->eqn, eq->cons_index, ret); in mlx4_eq_int()
698 eq->eqn, eq->cons_index, ret); in mlx4_eq_int()
783 eq->cons_index, eqe->owner, eq->nent, in mlx4_eq_int()
808 eq->cons_index, eqe->owner, eq->nent, in mlx4_eq_int()
820 eq->cons_index, eqe->owner, eq->nent, in mlx4_eq_int()
1023 eq->doorbell = mlx4_get_eq_uar(dev, eq); in mlx4_create_eq()
1226 struct mlx4_eq *eq = &priv->eq_table.eq[i]; in mlx4_init_eq_table() local
1473 eq = &priv->eq_table.eq[requested_vector]; in mlx4_assign_eq()
[all …]
/drivers/net/ethernet/mellanox/mlx5/core/lib/
A Deq.h51 static inline u32 eq_get_size(struct mlx5_eq *eq) in eq_get_size() argument
53 return eq->fbc.sz_m1 + 1; in eq_get_size()
58 return mlx5_frag_buf_get_wqe(&eq->fbc, entry); in get_eqe()
61 static inline struct mlx5_eqe *next_eqe_sw(struct mlx5_eq *eq) in next_eqe_sw() argument
63 struct mlx5_eqe *eqe = get_eqe(eq, eq->cons_index & eq->fbc.sz_m1); in next_eqe_sw()
65 return (eqe->owner ^ (eq->cons_index >> eq->fbc.log_sz)) & 1 ? NULL : eqe; in next_eqe_sw()
68 static inline void eq_update_ci(struct mlx5_eq *eq, int arm) in eq_update_ci() argument
70 __be32 __iomem *addr = eq->doorbell + (arm ? 0 : 2); in eq_update_ci()
71 u32 val = (eq->cons_index & 0xffffff) | (eq->eqn << 24); in eq_update_ci()
83 int mlx5_eq_add_cq(struct mlx5_eq *eq, struct mlx5_core_cq *cq);
[all …]
/drivers/scsi/elx/efct/
A Defct_hw_queues.c35 if (!eq) { in efct_hw_init_queues()
130 struct hw_eq *eq = kzalloc(sizeof(*eq), GFP_KERNEL); in efct_hw_new_eq() local
132 if (!eq) in efct_hw_new_eq()
139 eq->queue = &hw->eq[eq->instance]; in efct_hw_new_eq()
150 hw->hw_eq[eq->instance] = eq; in efct_hw_new_eq()
154 eq->queue->id, eq->entry_count); in efct_hw_new_eq()
155 return eq; in efct_hw_new_eq()
167 cq->eq = eq; in efct_hw_new_cq()
178 eq->instance, eq->entry_count); in efct_hw_new_cq()
393 if (!eq) in efct_hw_del_eq()
[all …]
/drivers/pci/controller/
A Dpcie-iproc-msi.c65 unsigned int eq; member
129 unsigned int eq) in iproc_msi_read_reg() argument
138 int eq, u32 val) in iproc_msi_write_reg() argument
335 eq = grp->eq; in iproc_msi_handler()
388 int i, eq; in iproc_msi_enable() local
411 for (eq = 0; eq < msi->nr_irqs; eq++) { in iproc_msi_enable()
423 val |= BIT(eq); in iproc_msi_enable()
431 u32 eq, val; in iproc_msi_disable() local
433 for (eq = 0; eq < msi->nr_irqs; eq++) { in iproc_msi_disable()
436 val &= ~BIT(eq); in iproc_msi_disable()
[all …]
/drivers/net/ethernet/ibm/ehea/
A Dehea_qmr.c236 struct ehea_eq *eq; in ehea_create_eq() local
238 eq = kzalloc(sizeof(*eq), GFP_KERNEL); in ehea_create_eq()
239 if (!eq) in ehea_create_eq()
249 &eq->attr, &eq->fw_handle); in ehea_create_eq()
255 ret = hw_queue_ctor(&eq->hw_queue, eq->attr.nr_pages, in ehea_create_eq()
290 return eq; in ehea_create_eq()
299 kfree(eq); in ehea_create_eq()
322 hret = ehea_h_free_resource(eq->adapter->handle, eq->fw_handle, force); in ehea_destroy_eq_res()
329 kfree(eq); in ehea_destroy_eq_res()
337 if (!eq) in ehea_destroy_eq()
[all …]
/drivers/net/ethernet/microsoft/mana/
A Dgdma_main.c324 e.eq.id = qid; in mana_gd_ring_doorbell()
326 e.eq.arm = num_req; in mana_gd_ring_doorbell()
491 u32 head = eq->head % (eq->queue_size / GDMA_EQE_SIZE); in mana_gd_process_eqe()
531 if (!eq->eq.callback) in mana_gd_process_eqe()
536 eq->eq.callback(eq->eq.context, eq, &event); in mana_gd_process_eqe()
617 eq->head++; in mana_gd_process_eq_events()
622 mana_gd_ring_doorbell(gc, eq->gdma_dev->doorbell, eq->type, eq->id, in mana_gd_process_eq_events()
683 if (queue == eq) { in mana_gd_deregister_irq()
786 queue->eq.callback = spec->eq.callback; in mana_gd_create_eq()
787 queue->eq.context = spec->eq.context; in mana_gd_create_eq()
[all …]
/drivers/net/ethernet/mellanox/mlx5/core/en/
A Dhealth.c52 void mlx5e_health_eq_diag_fmsg(struct mlx5_eq_comp *eq, struct devlink_fmsg *fmsg) in mlx5e_health_eq_diag_fmsg() argument
55 devlink_fmsg_u8_pair_put(fmsg, "eqn", eq->core.eqn); in mlx5e_health_eq_diag_fmsg()
56 devlink_fmsg_u32_pair_put(fmsg, "irqn", eq->core.irqn); in mlx5e_health_eq_diag_fmsg()
57 devlink_fmsg_u32_pair_put(fmsg, "vecidx", eq->core.vecidx); in mlx5e_health_eq_diag_fmsg()
58 devlink_fmsg_u32_pair_put(fmsg, "ci", eq->core.cons_index); in mlx5e_health_eq_diag_fmsg()
59 devlink_fmsg_u32_pair_put(fmsg, "size", eq_get_size(&eq->core)); in mlx5e_health_eq_diag_fmsg()
133 int mlx5e_health_channel_eq_recover(struct net_device *dev, struct mlx5_eq_comp *eq, in mlx5e_health_channel_eq_recover() argument
139 eq->core.eqn, eq->core.cons_index, eq->core.irqn); in mlx5e_health_channel_eq_recover()
141 eqe_count = mlx5_eq_poll_irq_disabled(eq); in mlx5e_health_channel_eq_recover()
146 eqe_count, eq->core.eqn); in mlx5e_health_channel_eq_recover()
/drivers/clk/spear/
A Dspear1340_clock.c268 {.xscale = 4, .yscale = 25, .eq = 0},
270 {.xscale = 4, .yscale = 21, .eq = 0},
272 {.xscale = 5, .yscale = 18, .eq = 0},
274 {.xscale = 2, .yscale = 6, .eq = 0},
276 {.xscale = 5, .yscale = 12, .eq = 0},
278 {.xscale = 2, .yscale = 4, .eq = 0},
282 {.xscale = 1, .yscale = 3, .eq = 1},
286 {.xscale = 1, .yscale = 2, .eq = 1},
359 {.xscale = 1, .yscale = 3, .eq = 0},
369 {.xscale = 1, .yscale = 4, .eq = 0},
[all …]
A Dspear1310_clock.c253 {.xscale = 4, .yscale = 21, .eq = 0}, /* 48 MHz */
254 {.xscale = 2, .yscale = 6, .eq = 0}, /* 83 MHz */
255 {.xscale = 2, .yscale = 4, .eq = 0}, /* 125 MHz */
256 {.xscale = 1, .yscale = 3, .eq = 1}, /* 166 MHz */
257 {.xscale = 1, .yscale = 2, .eq = 1}, /* 250 MHz */
320 {.xscale = 1, .yscale = 3, .eq = 0},
325 {.xscale = 1, .yscale = 2, .eq = 0}, /* 12.288 MHz */
331 {.xscale = 1, .yscale = 4, .eq = 0}, /* 1.53 MHz */
332 {.xscale = 1, .yscale = 2, .eq = 0}, /* 3.07 Mhz */
339 {.xscale = 1, .yscale = 31, .eq = 0}, /* 2.68 MHz */
[all …]
/drivers/infiniband/hw/mlx5/
A Dodp.c1633 struct mlx5_ib_pf_eq *eq = pfault->eq; in mlx5_ib_eqe_pf_action() local
1676 eq->dev, in mlx5_ib_eq_pf_process()
1703 eq->dev, in mlx5_ib_eq_pf_process()
1732 eq->dev, in mlx5_ib_eq_pf_process()
1739 eq->dev, in mlx5_ib_eq_pf_process()
1754 pfault->eq = eq; in mlx5_ib_eq_pf_process()
1814 if (eq->core) in mlx5r_odp_create_eq()
1818 eq->dev = dev; in mlx5r_odp_create_eq()
1830 if (!eq->wq) { in mlx5r_odp_create_eq()
1845 err = mlx5_eq_enable(dev->mdev, eq->core, &eq->irq_nb); in mlx5r_odp_create_eq()
[all …]
/drivers/infiniband/hw/efa/
A Defa_main.c110 struct efa_eq *eq = data; in efa_intr_msix_comp() local
111 struct efa_com_dev *edev = eq->eeq.edev; in efa_intr_msix_comp()
113 efa_com_eq_comp_intr_handler(edev, &eq->eeq); in efa_intr_msix_comp()
151 eq->irq.handler = efa_intr_msix_comp; in efa_setup_comp_irq()
152 eq->irq.data = eq; in efa_setup_comp_irq()
153 eq->irq.vector = vector; in efa_setup_comp_irq()
303 efa_com_eq_destroy(&dev->edev, &eq->eeq); in efa_destroy_eq()
304 efa_free_irq(dev, &eq->irq); in efa_destroy_eq()
311 efa_setup_comp_irq(dev, eq, msix_vec); in efa_create_eq()
312 err = efa_request_irq(dev, &eq->irq); in efa_create_eq()
[all …]
/drivers/firmware/broadcom/
A Dbcm47xx_nvram.c187 char *var, *value, *end, *eq; in bcm47xx_nvram_getenv() local
203 eq = strchr(var, '='); in bcm47xx_nvram_getenv()
204 if (!eq) in bcm47xx_nvram_getenv()
206 value = eq + 1; in bcm47xx_nvram_getenv()
207 if (eq - var == strlen(name) && in bcm47xx_nvram_getenv()
208 strncmp(var, name, eq - var) == 0) in bcm47xx_nvram_getenv()
/drivers/infiniband/hw/hns/
A Dhns_roce_hw_v2.c6222 (eq->cons_index & (eq->entries - 1)) * in next_aeqe_sw_v2()
6226 !!(eq->cons_index & eq->entries)) ? aeqe : NULL; in next_aeqe_sw_v2()
6281 update_eq_db(eq); in hns_roce_v2_aeq_int()
6291 (eq->cons_index & (eq->entries - 1)) * in next_ceqe_sw_v2()
6295 !!(eq->cons_index & eq->entries)) ? ceqe : NULL; in next_ceqe_sw_v2()
6560 eq->shift = ilog2((unsigned int)eq->entries); in init_eq_config()
6637 buf_attr.region[0].size = eq->entries * eq->eqe_size; in alloc_eq_buf()
6690 struct hns_roce_eq *eq = from_work(eq, work, work); in hns_roce_ceq_work() local
6805 free_irq(hr_dev->eq_table.eq[i].irq, &hr_dev->eq_table.eq[i]); in __hns_roce_free_irq()
6844 eq = &eq_table->eq[i]; in hns_roce_v2_init_eq_table()
[all …]
/drivers/accel/habanalabs/common/
A Dirq.c498 struct hl_eq *eq = arg; in hl_irq_handler_eq() local
499 struct hl_device *hdev = eq->hdev; in hl_irq_handler_eq()
507 eq_base = eq->kernel_address; in hl_irq_handler_eq()
510 cur_eqe = le32_to_cpu(eq_base[eq->ci].hdr.ctl); in hl_irq_handler_eq()
518 (((eq->prev_eqe_index + 1) & EQ_CTL_INDEX_MASK) != cur_eqe_index)) { in hl_irq_handler_eq()
522 ((eq->prev_eqe_index + 1) & EQ_CTL_INDEX_MASK), in hl_irq_handler_eq()
527 eq->prev_eqe_index++; in hl_irq_handler_eq()
529 eq_entry = &eq_base[eq->ci]; in hl_irq_handler_eq()
561 eq->ci = hl_eq_inc_ptr(eq->ci); in hl_irq_handler_eq()
563 hdev->asic_funcs->update_eq_ci(hdev, eq->ci); in hl_irq_handler_eq()
/drivers/infiniband/hw/ocrdma/
A Docrdma_hw.c113 return eq->q.va + (eq->q.tail * sizeof(struct ocrdma_eqe)); in ocrdma_get_eqe()
118 eq->q.tail = (eq->q.tail + 1) & (OCRDMA_EQ_LEN - 1); in ocrdma_eq_inc_tail()
455 eq->q.created = true; in ocrdma_mbx_create_eq()
473 eq->dev = dev; in ocrdma_create_eq()
495 if (eq->q.created) { in _ocrdma_destroy_eq()
511 free_irq(irq, eq); in ocrdma_destroy_eq()
541 cmd->eqn = eq->id; in ocrdma_mbx_mq_cq_create()
1002 int budget = eq->cq_cnt; in ocrdma_irq_handler()
3165 eq = &dev->eq_tbl[i]; in ocrdma_eqd_set_task()
3166 if (eq->aic_obj.eq_intr_cnt > eq->aic_obj.prev_eq_intr_cnt) { in ocrdma_eqd_set_task()
[all …]
/drivers/nvmem/
A Dbrcm_nvram.c145 char *eq, *name; in brcm_nvram_add_cells() local
147 eq = strchr(var, '='); in brcm_nvram_add_cells()
148 if (!eq) in brcm_nvram_add_cells()
150 *eq = '\0'; in brcm_nvram_add_cells()
152 *eq = '='; in brcm_nvram_add_cells()
157 value = eq + 1; in brcm_nvram_add_cells()
/drivers/nvmem/layouts/
A Du-boot-env.c58 char *var, *value, *eq; in u_boot_env_parse_cells() local
65 eq = strchr(var, '='); in u_boot_env_parse_cells()
66 if (!eq) in u_boot_env_parse_cells()
68 *eq = '\0'; in u_boot_env_parse_cells()
69 value = eq + 1; in u_boot_env_parse_cells()

Completed in 713 milliseconds

1234