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Searched refs:eseg (Results 1 – 9 of 9) sorted by relevance

/drivers/net/ethernet/mellanox/mlx5/core/en_accel/
A Dipsec_rxtx.c76 struct mlx5_wqe_eth_seg *eseg, u8 mode, in mlx5e_ipsec_set_swp() argument
95 eseg->swp_flags |= MLX5_ETH_WQE_SWP_OUTER_L3_IPV6; in mlx5e_ipsec_set_swp()
101 eseg->swp_flags |= MLX5_ETH_WQE_SWP_INNER_L3_IPV6; in mlx5e_ipsec_set_swp()
105 eseg->swp_flags |= MLX5_ETH_WQE_SWP_INNER_L4_UDP; in mlx5e_ipsec_set_swp()
124 eseg->swp_flags |= MLX5_ETH_WQE_SWP_OUTER_L4_UDP; in mlx5e_ipsec_set_swp()
137 eseg->swp_flags |= MLX5_ETH_WQE_SWP_INNER_L4_UDP; in mlx5e_ipsec_set_swp()
141 eseg->swp_inner_l4_offset = in mlx5e_ipsec_set_swp()
220 struct mlx5_wqe_eth_seg *eseg) in mlx5e_ipsec_tx_build_eseg() argument
241 mlx5e_ipsec_set_swp(skb, eseg, x->props.mode, xo); in mlx5e_ipsec_tx_build_eseg()
251 eseg->trailer |= (l3_proto == IPPROTO_ESP) ? in mlx5e_ipsec_tx_build_eseg()
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A Dipsec_rxtx.h80 static inline bool mlx5e_ipsec_eseg_meta(struct mlx5_wqe_eth_seg *eseg) in mlx5e_ipsec_eseg_meta() argument
82 return eseg->flow_table_metadata & cpu_to_be32(MLX5_ETH_WQE_FT_META_IPSEC); in mlx5e_ipsec_eseg_meta()
86 struct mlx5_wqe_eth_seg *eseg);
117 struct mlx5_wqe_eth_seg *eseg) in mlx5e_ipsec_txwqe_build_eseg_csum() argument
122 if (!mlx5e_ipsec_eseg_meta(eseg)) in mlx5e_ipsec_txwqe_build_eseg_csum()
125 eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM; in mlx5e_ipsec_txwqe_build_eseg_csum()
128 eseg->cs_flags |= MLX5_ETH_WQE_L3_INNER_CSUM; in mlx5e_ipsec_txwqe_build_eseg_csum()
131 eseg->cs_flags |= MLX5_ETH_WQE_L4_INNER_CSUM; in mlx5e_ipsec_txwqe_build_eseg_csum()
135 eseg->cs_flags |= MLX5_ETH_WQE_L4_CSUM; in mlx5e_ipsec_txwqe_build_eseg_csum()
148 static inline bool mlx5e_ipsec_eseg_meta(struct mlx5_wqe_eth_seg *eseg) in mlx5e_ipsec_eseg_meta() argument
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A Den_accel.h55 mlx5e_tx_tunnel_accel(struct sk_buff *skb, struct mlx5_wqe_eth_seg *eseg, u16 ihs) in mlx5e_tx_tunnel_accel() argument
88 mlx5e_set_eseg_swp(skb, eseg, &swp_spec); in mlx5e_tx_tunnel_accel()
90 mlx5e_eseg_swp_offsets_add_vlan(eseg); in mlx5e_tx_tunnel_accel()
175 struct mlx5_wqe_eth_seg *eseg, u16 ihs) in mlx5e_accel_tx_eseg() argument
179 mlx5e_ipsec_tx_build_eseg(priv, skb, eseg); in mlx5e_accel_tx_eseg()
184 mlx5e_macsec_tx_build_eseg(priv->macsec, skb, eseg); in mlx5e_accel_tx_eseg()
189 mlx5e_tx_tunnel_accel(skb, eseg, ihs); in mlx5e_accel_tx_eseg()
A Dmacsec.h23 struct mlx5_wqe_eth_seg *eseg);
A Dmacsec.c1669 struct mlx5_wqe_eth_seg *eseg) in mlx5e_macsec_tx_build_eseg() argument
1679 eseg->flow_table_metadata = cpu_to_be32(MLX5_ETH_WQE_FT_META_MACSEC | fs_id << 2); in mlx5e_macsec_tx_build_eseg()
/drivers/net/ethernet/mellanox/mlx5/core/
A Den_tx.c121 struct mlx5_wqe_eth_seg *eseg) in mlx5e_txwqe_build_eseg_csum() argument
432 struct mlx5_wqe_eth_seg *eseg; in mlx5e_sq_xmit_wqe() local
445 eseg = &wqe->eth; in mlx5e_sq_xmit_wqe()
448 eseg->mss = attr->mss; in mlx5e_sq_xmit_wqe()
451 u8 *start = eseg->inline_hdr.start; in mlx5e_sq_xmit_wqe()
518 struct mlx5_wqe_eth_seg *eseg) in mlx5e_tx_mpwqe_session_start() argument
653 struct mlx5_wqe_eth_seg *eseg) in mlx5e_cqe_ts_id_eseg() argument
656 eseg->flow_table_metadata = in mlx5e_cqe_ts_id_eseg()
981 struct mlx5_wqe_eth_seg *eseg; in mlx5i_sq_xmit() local
1001 eseg = &wqe->eth; in mlx5i_sq_xmit()
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/drivers/net/ethernet/mellanox/mlx5/core/en/
A Dtxrx.h469 eseg->swp_outer_l3_offset += VLAN_HLEN / 2; in mlx5e_eseg_swp_offsets_add_vlan()
470 eseg->swp_outer_l4_offset += VLAN_HLEN / 2; in mlx5e_eseg_swp_offsets_add_vlan()
471 eseg->swp_inner_l3_offset += VLAN_HLEN / 2; in mlx5e_eseg_swp_offsets_add_vlan()
472 eseg->swp_inner_l4_offset += VLAN_HLEN / 2; in mlx5e_eseg_swp_offsets_add_vlan()
480 eseg->swp_outer_l3_offset = skb_network_offset(skb) / 2; in mlx5e_set_eseg_swp()
482 eseg->swp_flags |= MLX5_ETH_WQE_SWP_OUTER_L3_IPV6; in mlx5e_set_eseg_swp()
486 eseg->swp_flags |= MLX5_ETH_WQE_SWP_OUTER_L4_UDP; in mlx5e_set_eseg_swp()
492 eseg->swp_flags |= MLX5_ETH_WQE_SWP_INNER_L3_IPV6; in mlx5e_set_eseg_swp()
494 eseg->swp_inner_l3_offset = skb_network_offset(skb) / 2; in mlx5e_set_eseg_swp()
496 eseg->swp_flags |= MLX5_ETH_WQE_SWP_INNER_L3_IPV6; in mlx5e_set_eseg_swp()
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A Dxdp.c299 struct mlx5_wqe_eth_seg *eseg = priv; in mlx5e_xsk_request_checksum() local
302 eseg->cs_flags |= MLX5_ETH_WQE_L3_CSUM | MLX5_ETH_WQE_L4_CSUM; in mlx5e_xsk_request_checksum()
538 struct mlx5_wqe_eth_seg *eseg; in mlx5e_xmit_xdp_frame() local
594 eseg = &wqe->eth; in mlx5e_xmit_xdp_frame()
599 memcpy(eseg->inline_hdr.start, xdptxd->data, sizeof(eseg->inline_hdr.start)); in mlx5e_xmit_xdp_frame()
600 memcpy(dseg, xdptxd->data + sizeof(eseg->inline_hdr.start), in mlx5e_xmit_xdp_frame()
601 inline_hdr_sz - sizeof(eseg->inline_hdr.start)); in mlx5e_xmit_xdp_frame()
618 memset(eseg, 0, sizeof(*eseg) - sizeof(eseg->trailer)); in mlx5e_xmit_xdp_frame()
620 eseg->inline_hdr.sz = cpu_to_be16(inline_hdr_sz); in mlx5e_xmit_xdp_frame()
645 xsk_tx_metadata_request(meta, &mlx5e_xsk_tx_metadata_ops, eseg); in mlx5e_xmit_xdp_frame()
/drivers/infiniband/hw/mlx5/
A Dwr.c57 struct mlx5_wqe_eth_seg *eseg = *seg; in set_eth_seg() local
59 memset(eseg, 0, sizeof(struct mlx5_wqe_eth_seg)); in set_eth_seg()
62 eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM | in set_eth_seg()
72 eseg->mss = cpu_to_be16(ud_wr->mss); in set_eth_seg()
73 eseg->inline_hdr.sz = cpu_to_be16(left); in set_eth_seg()
79 copysz = min_t(u64, *cur_edge - (void *)eseg->inline_hdr.start, in set_eth_seg()
81 memcpy(eseg->inline_hdr.data, pdata, copysz); in set_eth_seg()
83 sizeof(eseg->inline_hdr.start) + copysz, 16); in set_eth_seg()

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