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Searched refs:f4 (Results 1 – 25 of 70) sorted by relevance

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/drivers/gpu/drm/amd/display/dc/inc/
A Dreg_helper.h83 FN(reg, f4), v4)
91 FN(reg, f4), v4,\
100 FN(reg, f4), v4,\
110 FN(reg, f4), v4,\
121 FN(reg, f4), v4,\
133 FN(reg, f4), v4, \
146 FN(reg, f4), v4, \
250 FN(reg, f4), v4)
257 FN(reg, f4), v4, \
265 FN(reg, f4), v4, \
[all …]
/drivers/dma-buf/
A Dst-dma-fence-unwrap.c383 if (!f4) { in unwrap_merge_seqno()
406 dma_fence_put(f4); in unwrap_merge_seqno()
506 if (!f4) in unwrap_merge_complex()
535 dma_fence_put(f4); in unwrap_merge_complex()
573 f4 = __mock_fence(ctx[1], 2); in unwrap_merge_complex_seqno()
574 if (!f4) in unwrap_merge_complex_seqno()
593 if (fence == f1 && f4) { in unwrap_merge_complex_seqno()
597 dma_fence_put(f4); in unwrap_merge_complex_seqno()
598 f4 = NULL; in unwrap_merge_complex_seqno()
605 if (f1 || f4) { in unwrap_merge_complex_seqno()
[all …]
/drivers/hwmon/
A Dfam15h_power.c78 struct pci_dev *f4 = data->pdev; in power1_input_show() local
80 pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5), in power1_input_show()
97 pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5), in power1_input_show()
328 static bool should_load_on_this_node(struct pci_dev *f4) in should_load_on_this_node() argument
332 pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 3), in should_load_on_this_node()
385 static int fam15h_power_init_data(struct pci_dev *f4, in fam15h_power_init_data() argument
392 pci_read_config_dword(f4, REG_PROCESSOR_TDP, &val); in fam15h_power_init_data()
396 pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5), in fam15h_power_init_data()
404 dev_warn(&f4->dev, in fam15h_power_init_data()
411 ret = fam15h_power_init_attrs(f4, data); in fam15h_power_init_data()
/drivers/gpu/drm/amd/display/dmub/src/
A Ddmub_reg.h76 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
81 FN(reg, f4), v4)
103 #define REG_UPDATE_4(reg, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
108 FN(reg, f4), v4)
/drivers/pinctrl/qcom/
A Dpinctrl-lpass-lpi.h46 #define LPI_PINGROUP(id, soff, f1, f2, f3, f4) \ argument
55 LPI_MUX_##f4, \
A Dpinctrl-ipq5018.c13 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ argument
23 msm_mux_##f4, \
A Dpinctrl-ipq5332.c13 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ argument
23 msm_mux_##f4, \
A Dpinctrl-ipq5424.c14 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ argument
24 msm_mux_##f4, \
A Dpinctrl-ipq8064.c163 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10) \ argument
173 IPQ_MUX_##f4, \
A Dpinctrl-ipq9574.c13 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ argument
23 msm_mux_##f4, \
A Dpinctrl-ipq8074.c13 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ argument
23 msm_mux_##f4, \
A Dpinctrl-mdm9615.c197 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \ argument
207 msm_mux_##f4, \
A Dpinctrl-apq8064.c211 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10) \ argument
221 APQ_MUX_##f4, \
A Dpinctrl-msm8226.c265 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7) \ argument
275 msm_mux_##f4, \
A Dpinctrl-sc8180x.c41 #define PINGROUP_OFFSET(id, _tile, offset, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ argument
51 msm_mux_##f4, \
81 #define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ argument
82 PINGROUP_OFFSET(id, _tile, 0x0, f1, f2, f3, f4, f5, f6, f7, f8, f9)
A Dpinctrl-ipq6018.c13 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ argument
23 msm_mux_##f4, \
A Dpinctrl-mdm9607.c206 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ argument
216 msm_mux_##f4, \
A Dpinctrl-sdx55.c14 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ argument
24 msm_mux_##f4, \
A Dpinctrl-sdx65.c14 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ argument
24 msm_mux_##f4, \
A Dpinctrl-ipq4019.c218 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14) \ argument
228 qca_mux_##f4, \
A Dpinctrl-sm6115.c24 #define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ argument
34 msm_mux_##f4, \
/drivers/pinctrl/
A Dpinctrl-rp1.c148 #define PIN(i, f0, f1, f2, f3, f4, f5, f6, f7, f8) \ argument
155 func_##f4, \
163 #define LEGACY_MAP(n, f0, f1, f2, f3, f4, f5) \ argument
168 func_##f4, \
A Dpinctrl-lpc18xx.c213 #define LPC_P(port, pin, f0, f1, f2, f3, f4, f5, f6, f7, a, t) \ argument
218 FUNC_##f3, FUNC_##f4, FUNC_##f5, \
225 #define LPC_N(pname, off, f0, f1, f2, f3, f4, f5, f6, f7, a, t) \ argument
230 FUNC_##f3, FUNC_##f4, FUNC_##f5, \
/drivers/gpu/drm/ci/xfails/
A Drockchip-rk3399-flakes.txt135 # Bug Report: https://lore.kernel.org/dri-devel/eece9a80-42f3-41f4-86cc-69d8a51b976a@collabora.com/…
/drivers/zorro/
A Dzorro.ids50 02f4 Progressive Peripherals & Systems
82 03f4 Access Associates Alegra

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