| /drivers/gpu/drm/i915/display/ |
| A D | intel_fbc.c | 724 return fbc->funcs->is_active(fbc); in intel_fbc_hw_is_active()
734 fbc->funcs->activate(fbc); in intel_fbc_hw_activate()
743 fbc->funcs->deactivate(fbc); in intel_fbc_hw_deactivate()
760 fbc->funcs->nuke(fbc); in intel_fbc_nuke()
909 fbc->funcs->program_cfb(fbc); in intel_fbc_program_cfb()
1270 struct intel_fbc *fbc = plane->fbc; in intel_fbc_dirty_rect_update_noarm() local
1308 struct intel_fbc *fbc = plane->fbc; in intel_fbc_update_state() local
2078 plane->fbc = fbc; in intel_fbc_add_plane()
2172 if (plane->fbc != fbc) in intel_fbc_debugfs_status_show()
2209 fbc->funcs->set_false_color(fbc, fbc->false_color); in intel_fbc_debugfs_false_color_set()
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| A D | intel_wm_types.h | 28 u16 fbc; member
34 u16 fbc; member
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| A D | i9xx_wm.c | 1043 raw->fbc = value; in g4x_raw_fbc_wm_set()
1098 raw->fbc = wm; in g4x_raw_plane_wm_compute()
1214 wm_state->sr.fbc = raw->fbc; in _g4x_compute_pipe_wm()
1225 wm_state->hpll.fbc = raw->fbc; in _g4x_compute_pipe_wm()
1319 intermediate->sr.fbc = max(optimal->sr.fbc, in g4x_compute_intermediate_wm()
1320 active->sr.fbc); in g4x_compute_intermediate_wm()
1326 intermediate->hpll.fbc = max(optimal->hpll.fbc, in g4x_compute_intermediate_wm()
2431 u16 fbc; member
3808 raw->fbc = active->sr.fbc; in g4x_wm_get_hw_state()
3818 raw->fbc = active->hpll.fbc; in g4x_wm_get_hw_state()
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| A D | intel_fbc.h | 46 void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane);
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| A D | intel_display_trace.h | 280 __field(bool, fbc)
293 __entry->sr_fbc = wm->sr.fbc;
296 __entry->hpll_fbc = wm->hpll.fbc;
299 __entry->fbc = wm->fbc_en;
308 str_yes_no(__entry->fbc))
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| A D | intel_display_core.h | 588 struct intel_fbc *fbc[I915_MAX_FBCS]; member
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| A D | i9xx_plane.c | 137 return display->fbc[INTEL_FBC_A]; in i9xx_plane_fbc()
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| /drivers/video/fbdev/ |
| A D | cg6.c | 272 struct cg6_fbc __iomem *fbc = par->fbc; in cg6_sync() local
320 struct cg6_fbc __iomem *fbc = par->fbc; in cg6_fillrect() local
333 sbus_writel(0, &fbc->s); in cg6_fillrect()
334 sbus_writel(0, &fbc->clip); in cg6_fillrect()
359 struct cg6_fbc __iomem *fbc = par->fbc; in cg6_copyarea() local
371 sbus_writel(0, &fbc->s); in cg6_copyarea()
397 struct cg6_fbc __iomem *fbc = par->fbc; in cg6_imageblit() local
417 sbus_writel(0, &fbc->s); in cg6_imageblit()
671 struct cg6_fbc __iomem *fbc = par->fbc; in cg6_chip_init() local
701 i = sbus_readl(&fbc->s); in cg6_chip_init()
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| A D | ffb.c | 242 u32 fbc; member
382 fbc = par->fbc; in FFBFifo()
396 fbc = par->fbc; in FFBWait()
426 struct ffb_fbc __iomem *fbc = par->fbc; in ffb_switch_from_graph() local
436 &fbc->ppc); in ffb_switch_from_graph()
437 upa_writel(0x2000707f, &fbc->fbc); in ffb_switch_from_graph()
479 struct ffb_fbc __iomem *fbc = par->fbc; in ffb_fillrect() local
519 struct ffb_fbc __iomem *fbc = par->fbc; in ffb_copyarea() local
553 struct ffb_fbc __iomem *fbc = par->fbc; in ffb_imageblit() local
918 if (!par->fbc) in ffb_probe()
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| /drivers/net/ethernet/mellanox/mlx5/core/ |
| A D | wq.h | 52 struct mlx5_frag_buf_ctrl fbc; member
65 struct mlx5_frag_buf_ctrl fbc; member
71 struct mlx5_frag_buf_ctrl fbc; member
102 return (u32)wq->fbc.sz_m1 + 1; in mlx5_wq_cyc_get_size()
144 return ctr & wq->fbc.sz_m1; in mlx5_wq_cyc_ctr2ix()
182 return wq->fbc.sz_m1 + 1; in mlx5_cqwq_get_size()
187 return wq->fbc.log_stride; in mlx5_cqwq_get_log_stride_size()
192 return ctr & wq->fbc.sz_m1; in mlx5_cqwq_ctr2ix()
205 cqe += wq->fbc.log_stride == 7; in mlx5_cqwq_get_wqe()
212 return ctr >> wq->fbc.log_sz; in mlx5_cqwq_get_ctr_wrap_cnt()
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| A D | wq.c | 43 struct mlx5_frag_buf_ctrl *fbc = &wq->fbc; in mlx5_wq_cyc_create() local
61 mlx5_init_fbc(wq_ctrl->buf.frags, log_wq_stride, log_wq_sz, fbc); in mlx5_wq_cyc_create()
84 len = nstrides << wq->fbc.log_stride; in mlx5_wq_cyc_wqe_dump()
128 mlx5_init_fbc(wq_ctrl->buf.frags, log_rq_stride, log_rq_sz, &wq->rq.fbc); in mlx5_wq_qp_create()
138 &wq->sq.fbc); in mlx5_wq_qp_create()
143 log_sq_stride, log_sq_sz, &wq->sq.fbc); in mlx5_wq_qp_create()
185 mlx5_init_fbc(wq_ctrl->buf.frags, log_wq_stride, log_wq_sz, &wq->fbc); in mlx5_cqwq_create()
202 for (i = 0; i < wq->fbc.sz_m1; i++) { in mlx5_wq_ll_init_list()
216 struct mlx5_frag_buf_ctrl *fbc = &wq->fbc; in mlx5_wq_ll_create() local
234 mlx5_init_fbc(wq_ctrl->buf.frags, log_wq_stride, log_wq_sz, fbc); in mlx5_wq_ll_create()
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| A D | eq.c | 284 mlx5_init_fbc(eq->frag_buf.frags, log_eq_stride, log_eq_size, &eq->fbc); in create_map_eq()
311 MLX5_SET(eqc, eqc, log_eq_size, eq->fbc.log_sz); in create_map_eq()
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| /drivers/net/ethernet/mellanox/mlx5/core/lib/ |
| A D | eq.h | 25 struct mlx5_frag_buf_ctrl fbc; member
53 return eq->fbc.sz_m1 + 1; in eq_get_size()
58 return mlx5_frag_buf_get_wqe(&eq->fbc, entry); in get_eqe()
63 struct mlx5_eqe *eqe = get_eqe(eq, eq->cons_index & eq->fbc.sz_m1); in next_eqe_sw()
65 return (eqe->owner ^ (eq->cons_index >> eq->fbc.log_sz)) & 1 ? NULL : eqe; in next_eqe_sw()
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| /drivers/infiniband/hw/mlx5/ |
| A D | wr.h | 38 (&sq->fbc, in get_sq_edge()
39 mlx5_frag_buf_get_idx_last_contig_stride(&sq->fbc, idx)); in get_sq_edge()
62 *seg = mlx5_frag_buf_get_wqe(&sq->fbc, idx); in handle_post_send_edge()
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| A D | srq.c | 15 return mlx5_frag_buf_get_wqe(&srq->fbc, n); in get_wqe()
126 &srq->fbc); in create_srq_kernel()
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| A D | cq.c | 74 return mlx5_frag_buf_get_wqe(&cq->buf.fbc, n); in get_cqe()
688 mlx5_init_fbc(frag_buf->frags, log_wq_stride, log_wq_sz, &buf->fbc); in alloc_cq_frag_buf()
881 cqe = mlx5_frag_buf_get_wqe(&buf->fbc, i); in init_cq_frag_buf()
1257 dcqe = mlx5_frag_buf_get_wqe(&cq->resize_buf->fbc, in copy_resize_cqes()
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| A D | mlx5_ib.h | 362 struct mlx5_frag_buf_ctrl fbc; member
554 struct mlx5_frag_buf_ctrl fbc; member
601 struct mlx5_frag_buf_ctrl fbc; member
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| A D | wr.c | 713 p = mlx5_frag_buf_get_wqe(&qp->sq.fbc, idx); in dump_wqe()
733 *seg = mlx5_frag_buf_get_wqe(&qp->sq.fbc, *idx); in mlx5r_begin_wqe()
1246 scat = mlx5_frag_buf_get_wqe(&qp->rq.fbc, ind); in mlx5_ib_post_recv()
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| A D | qp.c | 155 wqe_index = wqe_index & qp->sq.fbc.sz_m1; in mlx5_ib_read_kernel_wqe_sq()
158 p = mlx5_frag_buf_get_wqe(&qp->sq.fbc, wqe_index); in mlx5_ib_read_kernel_wqe_sq()
174 wqe_index = (wqe_index + 1) & qp->sq.fbc.sz_m1; in mlx5_ib_read_kernel_wqe_sq()
175 p = mlx5_frag_buf_get_wqe(&qp->sq.fbc, wqe_index); in mlx5_ib_read_kernel_wqe_sq()
1138 ilog2(qp->rq.wqe_cnt), &qp->rq.fbc); in _create_kernel_qp()
1147 sq_strides_offset, &qp->sq.fbc); in _create_kernel_qp()
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| /drivers/gpu/drm/ci/xfails/ |
| A D | i915-glk-fails.txt | 31 kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-cpu,Timeout
32 kms_frontbuffer_tracking@fbc-tiling-linear,Fail
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| A D | i915-whl-fails.txt | 32 kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-cpu,Timeout
33 kms_frontbuffer_tracking@fbc-tiling-linear,Fail
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| A D | i915-amly-fails.txt | 30 kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-cpu,Timeout
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| /drivers/vfio/pci/mlx5/ |
| A D | cmd.h | 117 struct mlx5_frag_buf_ctrl fbc; member
151 struct mlx5_frag_buf_ctrl fbc; member
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| A D | cmd.c | 1067 mlx5_init_fbc(frag_buf->frags, log_wq_stride, log_wq_sz, &buf->fbc); in alloc_cq_frag_buf()
1080 cqe = mlx5_frag_buf_get_wqe(&buf->fbc, i); in init_cq_frag_buf()
1253 mlx5_init_fbc(qp->buf.frags, log_rq_stride, log_rq_sz, &qp->rq.fbc); in mlx5vf_create_rc_qp()
1316 data = mlx5_frag_buf_get_wqe(&qp->rq.fbc, ix); in mlx5vf_post_recv()
1678 return mlx5_frag_buf_get_wqe(&cq->buf.fbc, n); in get_cqe()
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| /drivers/vdpa/mlx5/net/ |
| A D | mlx5_vnet.c | 64 struct mlx5_frag_buf_ctrl fbc; member
78 struct mlx5_frag_buf_ctrl fbc; member
317 mlx5_init_fbc(frag_buf->frags, log_wq_stride, log_wq_sz, &buf->fbc); in cq_frag_buf_alloc()
340 return mlx5_frag_buf_get_wqe(&vcq->buf.fbc, n); in get_cqe()
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