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Searched refs:fcr (Results 1 – 25 of 28) sorted by relevance

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/drivers/net/ethernet/freescale/
A Dgianfar_ethtool.c609 u32 fcr = 0x0, fpr = FPR_FILER_MASK; in ethflow_to_filer_rules() local
612 fcr = RQFCR_PID_DAH | RQFCR_CMP_NOMATCH | in ethflow_to_filer_rules()
615 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr; in ethflow_to_filer_rules()
619 fcr = RQFCR_PID_DAL | RQFCR_CMP_NOMATCH | in ethflow_to_filer_rules()
622 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr; in ethflow_to_filer_rules()
632 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr; in ethflow_to_filer_rules()
640 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr; in ethflow_to_filer_rules()
649 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr; in ethflow_to_filer_rules()
658 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr; in ethflow_to_filer_rules()
667 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr; in ethflow_to_filer_rules()
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A Dgianfar.h1236 unsigned int far, unsigned int fcr, unsigned int fpr) in gfar_write_filer() argument
1241 gfar_write(&regs->rqfcr, fcr); in gfar_write_filer()
1246 unsigned int far, unsigned int *fcr, unsigned int *fpr) in gfar_read_filer() argument
1251 *fcr = gfar_read(&regs->rqfcr); in gfar_read_filer()
/drivers/tty/serial/8250/
A D8250_port.c268 .fcr = UART_FCR_ENABLE_FIFO |
507 serial_out(p, UART_FCR, p->fcr); in serial8250_clear_and_reinit_fifos()
2673 up->fcr &= ~UART_FCR_TRIGGER_MASK; in serial8250_set_trigger_for_slow_speed()
2674 up->fcr |= UART_FCR_TRIGGER_1; in serial8250_set_trigger_for_slow_speed()
2783 if (up->fcr & UART_FCR_ENABLE_FIFO) in serial8250_set_fcr()
2786 serial_port_out(port, UART_FCR, up->fcr); in serial8250_set_fcr()
3063 up->fcr &= ~UART_FCR_TRIGGER_MASK; in do_set_rxtrig()
3064 up->fcr |= (unsigned char)rxtrig; in do_set_rxtrig()
3065 serial_out(up, UART_FCR, up->fcr); in do_set_rxtrig()
3150 up->fcr = uart_config[up->port.type].fcr; in serial8250_config_port()
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A D8250_em.c87 unsigned int ier, fcr, lcr, mcr, hcr0; in serial8250_em_reg_update() local
90 fcr = serial8250_em_serial_in(p, UART_FCR_EM); in serial8250_em_reg_update()
95 serial8250_em_serial_out_helper(p, UART_FCR_EM, fcr | in serial8250_em_reg_update()
105 fcr = value; in serial8250_em_reg_update()
116 serial8250_em_serial_out_helper(p, UART_FCR_EM, fcr); in serial8250_em_reg_update()
A D8250_omap.c228 serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | in omap_8250_mdr1_errataset()
330 serial_out(up, UART_FCR, up->fcr); in omap8250_restore_regs()
477 up->fcr = UART_FCR_ENABLE_FIFO; in omap_8250_set_termios()
478 up->fcr |= TRIGGER_FCR_MASK(priv->tx_trigger) << OMAP_UART_FCR_TX_TRIG; in omap_8250_set_termios()
479 up->fcr |= TRIGGER_FCR_MASK(priv->rx_trigger) << OMAP_UART_FCR_RX_TRIG; in omap_8250_set_termios()
A D8250.h71 unsigned char fcr; member
A D8250_ni.c324 uart->fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10; in ni16550_probe()
/drivers/mtd/nand/raw/
A Dfsl_elbc_nand.c241 in_be32(&lbc->fir), in_be32(&lbc->fcr), in fsl_elbc_run_command()
301 out_be32(&lbc->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT); in fsl_elbc_do_read()
374 out_be32(&lbc->fcr, command << FCR_CMD0_SHIFT); in fsl_elbc_cmdfunc()
406 out_be32(&lbc->fcr, in fsl_elbc_cmdfunc()
420 __be32 fcr; in fsl_elbc_cmdfunc() local
438 fcr = (NAND_CMD_STATUS << FCR_CMD1_SHIFT) | in fsl_elbc_cmdfunc()
464 fcr |= NAND_CMD_READOOB << FCR_CMD0_SHIFT; in fsl_elbc_cmdfunc()
467 fcr |= NAND_CMD_READ0 << FCR_CMD0_SHIFT; in fsl_elbc_cmdfunc()
470 out_be32(&lbc->fcr, fcr); in fsl_elbc_cmdfunc()
502 out_be32(&lbc->fcr, NAND_CMD_STATUS << FCR_CMD0_SHIFT); in fsl_elbc_cmdfunc()
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/drivers/net/ethernet/davicom/
A Ddm9051.c260 u8 fcr = 0; in dm9051_set_fcr() local
263 fcr |= FCR_BKPM | FCR_FLCE; in dm9051_set_fcr()
265 fcr |= FCR_TXPEN; in dm9051_set_fcr()
267 return dm9051_set_reg(db, DM9051_FCR, fcr); in dm9051_set_fcr()
305 u8 fcr = 0; in dm9051_update_fcr() local
308 fcr |= FCR_BKPM | FCR_FLCE; in dm9051_update_fcr()
310 fcr |= FCR_TXPEN; in dm9051_update_fcr()
312 return dm9051_update_bits(db, DM9051_FCR, FCR_RXTX_BITS, fcr); in dm9051_update_fcr()
/drivers/tty/serial/
A Dpch_uart.c221 unsigned int fcr; member
481 iowrite8(PCH_UART_FCR_FIFOE | priv->fcr, priv->membase + UART_FCR); in pch_uart_hal_fifo_reset()
482 iowrite8(PCH_UART_FCR_FIFOE | priv->fcr | flag, in pch_uart_hal_fifo_reset()
484 iowrite8(priv->fcr, priv->membase + UART_FCR); in pch_uart_hal_fifo_reset()
493 u8 fcr; in pch_uart_hal_set_fifo() local
531 fcr = in pch_uart_hal_set_fifo()
536 iowrite8(fcr, priv->membase + UART_FCR); in pch_uart_hal_set_fifo()
537 priv->fcr = fcr; in pch_uart_hal_set_fifo()
1708 priv->fcr = 0; in pch_uart_init_port()
A Dserial-tegra.c307 unsigned long fcr = tup->fcr_shadow; in tegra_uart_fifo_reset() local
314 fcr |= fcr_bits & (UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); in tegra_uart_fifo_reset()
315 tegra_uart_write(tup, fcr, UART_FCR); in tegra_uart_fifo_reset()
317 fcr &= ~UART_FCR_ENABLE_FIFO; in tegra_uart_fifo_reset()
318 tegra_uart_write(tup, fcr, UART_FCR); in tegra_uart_fifo_reset()
320 fcr |= fcr_bits & (UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); in tegra_uart_fifo_reset()
321 tegra_uart_write(tup, fcr, UART_FCR); in tegra_uart_fifo_reset()
322 fcr |= UART_FCR_ENABLE_FIFO; in tegra_uart_fifo_reset()
323 tegra_uart_write(tup, fcr, UART_FCR); in tegra_uart_fifo_reset()
A Dpxa.c406 unsigned char cval, fcr = 0; in serial_pxa_set_termios() local
427 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1; in serial_pxa_set_termios()
429 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8; in serial_pxa_set_termios()
431 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32; in serial_pxa_set_termios()
506 serial_out(up, UART_FCR, fcr); in serial_pxa_set_termios()
A Dsunsu.c752 unsigned char cval, fcr = 0; in sunsu_change_speed() local
791 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1; in sunsu_change_speed()
794 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14; in sunsu_change_speed()
797 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8; in sunsu_change_speed()
800 fcr |= UART_FCR7_64BYTE; in sunsu_change_speed()
858 serial_out(up, UART_FCR, fcr); /* set fcr */ in sunsu_change_speed()
862 if (fcr & UART_FCR_ENABLE_FIFO) { in sunsu_change_speed()
866 serial_out(up, UART_FCR, fcr); /* set fcr */ in sunsu_change_speed()
A Domap-serial.c134 unsigned char fcr; member
811 up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 | in serial_omap_set_termios()
900 up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK; in serial_omap_set_termios()
901 up->fcr &= ~OMAP_UART_FCR_TX_FIFO_TRIG_MASK; in serial_omap_set_termios()
902 up->fcr |= UART_FCR6_R_TRIGGER_16 | UART_FCR6_T_TRIGGER_24 | in serial_omap_set_termios()
905 serial_out(up, UART_FCR, up->fcr); in serial_omap_set_termios()
1686 serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | in serial_omap_mdr1_errataset()
1722 serial_out(up, UART_FCR, up->fcr); in serial_omap_restore_context()
A Dma35d1_serial.c380 u32 fcr; in ma35d1serial_startup() local
396 fcr = serial_in(up, MA35_FCR_REG); in ma35d1serial_startup()
397 fcr |= MA35_FCR_RFITL_4BYTES | MA35_FCR_RTSTL_8BYTES; in ma35d1serial_startup()
398 serial_out(up, MA35_FCR_REG, fcr); in ma35d1serial_startup()
A Dmilbeaut_usio.c123 u16 fcr = readw(port->membase + MLB_USIO_REG_FCR); in mlb_usio_start_tx() local
125 writew(fcr | MLB_USIO_FCR_FTIE, port->membase + MLB_USIO_REG_FCR); in mlb_usio_start_tx()
126 if (!(fcr & MLB_USIO_FCR_FDRQ)) in mlb_usio_start_tx()
A Dserial_txx9.c577 unsigned int cval, fcr = 0; in serial_txx9_set_termios() local
623 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1; in serial_txx9_set_termios()
677 sio_out(up, TXX9_SIFCR, fcr); in serial_txx9_set_termios()
/drivers/mmc/core/
A Dsdio_uart.c249 unsigned char cval, fcr = 0; in sdio_uart_change_speed() local
281 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1; in sdio_uart_change_speed()
283 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10; in sdio_uart_change_speed()
327 sdio_out(port, UART_FCR, fcr); in sdio_uart_change_speed()
/drivers/clk/renesas/
A Drcar-gen3-cpg.c272 unsigned int fcr, in __cpg_z_clk_register() argument
289 zclk->reg = reg + fcr; in __cpg_z_clk_register()
/drivers/ata/
A Dpata_macio.c889 u32 fcr = readl(priv->kauai_fcr); in pata_macio_do_suspend() local
890 fcr &= ~(KAUAI_FCR_UATA_RESET_N | KAUAI_FCR_UATA_ENABLE); in pata_macio_do_suspend()
891 writel(fcr, priv->kauai_fcr); in pata_macio_do_suspend()
/drivers/net/ethernet/faraday/
A Dftgmac100.c264 u32 fcr = FTGMAC100_FCR_PAUSE_TIME(16); in ftgmac100_config_pause() local
268 fcr |= FTGMAC100_FCR_FC_EN; in ftgmac100_config_pause()
274 fcr |= FTGMAC100_FCR_FCTHR_EN; in ftgmac100_config_pause()
276 iowrite32(fcr, priv->base + FTGMAC100_OFFSET_FCR); in ftgmac100_config_pause()
/drivers/net/ethernet/broadcom/genet/
A Dbcmgenet.h107 u32 fcr; /* RO # of carrier sense error pkt */ member
/drivers/tty/
A Dmxser.c715 u8 fcr = UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT; in mxser_disable_and_clear_FIFO() local
718 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; in mxser_disable_and_clear_FIFO()
720 outb(fcr, info->ioaddr + UART_FCR); in mxser_disable_and_clear_FIFO()
/drivers/net/ethernet/broadcom/
A Dbcmsysport.h524 u32 fcr; /* RO # of carrier sense error pkt */ member
/drivers/bluetooth/
A Dbtnxpuart.c313 struct uart_reg fcr; member
833 uart_config.fcr.address = __cpu_to_le32(uartfcraddr); in nxp_fw_change_baudrate()
834 uart_config.fcr.value = __cpu_to_le32(FCR); in nxp_fw_change_baudrate()

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