| /drivers/gpu/drm/xe/ |
| A D | xe_gsc_submit.c | 23 #define mtl_gsc_header_wr(xe_, map_, offset_, field_, val_) \ argument
24 xe_map_wr_field(xe_, map_, offset_, struct intel_gsc_mtl_header, field_, val_)
26 #define mtl_gsc_header_rd(xe_, map_, offset_, field_) \ argument
27 xe_map_rd_field(xe_, map_, offset_, struct intel_gsc_mtl_header, field_)
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| A D | xe_huc.c | 132 #define huc_auth_msg_wr(xe_, map_, offset_, field_, val_) \ argument
133 xe_map_wr_field(xe_, map_, offset_, struct pxp43_new_huc_auth_in, field_, val_)
134 #define huc_auth_msg_rd(xe_, map_, offset_, field_) \ argument
135 xe_map_rd_field(xe_, map_, offset_, struct pxp43_huc_auth_out, field_)
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| A D | xe_guc_ads.c | 122 #define ads_blob_read(ads_, field_) \ argument
124 struct __guc_ads_blob, field_)
126 #define ads_blob_write(ads_, field_, val_) \ argument
128 struct __guc_ads_blob, field_, val_)
130 #define info_map_write(xe_, map_, field_, val_) \ argument
131 xe_map_wr_field(xe_, map_, 0, struct guc_gt_system_info, field_, val_)
133 #define info_map_read(xe_, map_, field_) \ argument
134 xe_map_rd_field(xe_, map_, 0, struct guc_gt_system_info, field_)
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| A D | xe_guc_engine_activity.c | 162 #define read_engine_activity_record(xe_, map_, field_) \ argument
163 xe_map_rd_field(xe_, map_, 0, struct guc_engine_activity, field_)
165 #define read_metadata_record(xe_, map_, field_) \ argument
166 xe_map_rd_field(xe_, map_, 0, struct guc_engine_activity_metadata, field_)
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| A D | xe_gsc_proxy.c | 200 #define proxy_header_wr(xe_, map_, offset_, field_, val_) \ argument
201 xe_map_wr_field(xe_, map_, offset_, struct xe_gsc_proxy_header, field_, val_)
203 #define proxy_header_rd(xe_, map_, offset_, field_) \ argument
204 xe_map_rd_field(xe_, map_, offset_, struct xe_gsc_proxy_header, field_)
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| A D | xe_gsc.c | 110 #define version_query_wr(xe_, map_, offset_, field_, val_) \ argument
111 xe_map_wr_field(xe_, map_, offset_, struct gsc_get_compatibility_version_in, field_, val_)
112 #define version_query_rd(xe_, map_, offset_, field_) \ argument
113 xe_map_rd_field(xe_, map_, offset_, struct gsc_get_compatibility_version_out, field_)
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| A D | xe_guc_pc.c | 115 #define slpc_shared_data_read(pc_, field_) \ argument
117 struct slpc_shared_data, field_)
119 #define slpc_shared_data_write(pc_, field_, val_) \ argument
121 struct slpc_shared_data, field_, val_)
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| A D | xe_guc_ct.c | 275 #define desc_read(xe_, guc_ctb__, field_) \ argument
277 struct guc_ct_buffer_desc, field_)
279 #define desc_write(xe_, guc_ctb__, field_, val_) \ argument
281 struct guc_ct_buffer_desc, field_, val_)
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| A D | xe_guc_submit.c | 462 #define parallel_read(xe_, map_, field_) \ argument
464 field_)
465 #define parallel_write(xe_, map_, field_, val_) \ argument
467 field_, val_)
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| /drivers/gpu/drm/i915/gt/uc/ |
| A D | intel_guc_ads.c | 71 #define ads_blob_read(guc_, field_) \ argument
72 iosys_map_rd_field(&(guc_)->ads_map, 0, struct __guc_ads_blob, field_)
74 #define ads_blob_write(guc_, field_, val_) \ argument
76 field_, val_)
78 #define info_map_write(map_, field_, val_) \ argument
79 iosys_map_wr_field(map_, 0, struct guc_gt_system_info, field_, val_)
81 #define info_map_read(map_, field_) \ argument
82 iosys_map_rd_field(map_, 0, struct guc_gt_system_info, field_)
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| A D | intel_guc_submission.c | 1214 #define record_read(map_, field_) \ argument
1215 iosys_map_rd_field(map_, 0, struct guc_engine_usage_record, field_)
1251 #define record_write(map_, field_, val_) \ in __set_engine_usage_record() argument
1252 iosys_map_wr_field(map_, 0, struct guc_engine_usage_record, field_, val_) in __set_engine_usage_record()
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| /drivers/gpu/drm/imagination/ |
| A D | pvr_mmu.c | 384 #define PVR_PAGE_TABLE_FIELD_GET(level_, name_, field_, entry_) \ argument
386 ~ROGUE_MMUCTRL_##name_##_DATA_##field_##_CLRMSK) >> \
387 ROGUE_MMUCTRL_##name_##_DATA_##field_##_SHIFT)
389 #define PVR_PAGE_TABLE_FIELD_PREP(level_, name_, field_, val_) \ argument
391 << ROGUE_MMUCTRL_##name_##_DATA_##field_##_SHIFT) & \
392 ~ROGUE_MMUCTRL_##name_##_DATA_##field_##_CLRMSK)
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