Searched refs:flush_mask (Results 1 – 11 of 11) sorted by relevance
| /drivers/gpu/drm/msm/disp/mdp5/ |
| A D | mdp5_ctl.c | 39 u32 flush_mask; member
474 u32 flush_mask) in fix_sw_flush() argument
497 *flush_mask = 0; in fix_for_single_flush()
538 u32 flush_mask, bool start) in mdp5_ctl_commit() argument
548 flush_mask |= MDP5_CTL_FLUSH_CTL; in mdp5_ctl_commit()
552 flush_mask |= fix_sw_flush(ctl, pipeline, flush_mask); in mdp5_ctl_commit()
556 curr_ctl_flush_mask = flush_mask; in mdp5_ctl_commit()
561 ctl->flush_mask |= flush_mask; in mdp5_ctl_commit()
564 flush_mask |= ctl->flush_mask; in mdp5_ctl_commit()
565 ctl->flush_mask = 0; in mdp5_ctl_commit()
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| A D | mdp5_crtc.c | 100 DBG("%s: flush=%08x", crtc->name, flush_mask); in crtc_flush()
102 return mdp5_ctl_commit(ctl, pipeline, flush_mask, start); in crtc_flush()
115 uint32_t flush_mask = 0; in crtc_flush_all() local
124 flush_mask |= mdp5_plane_get_flush(plane); in crtc_flush_all()
128 flush_mask |= mdp_ctl_flush_mask_lm(mixer->lm); in crtc_flush_all()
132 flush_mask |= mdp_ctl_flush_mask_lm(r_mixer->lm); in crtc_flush_all()
134 return crtc_flush(crtc, flush_mask); in crtc_flush_all()
961 uint32_t flush_mask = mdp_ctl_flush_mask_cursor(0); in mdp5_crtc_cursor_set() local
1024 crtc_flush(crtc, flush_mask); in mdp5_crtc_cursor_set()
1041 uint32_t flush_mask = mdp_ctl_flush_mask_cursor(0); in mdp5_crtc_cursor_move() local
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| A D | mdp5_mixer.h | 20 uint32_t flush_mask; /* used to commit LM registers */ member
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| A D | mdp5_pipe.h | 23 uint32_t flush_mask; /* used to commit pipe registers */ member
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| A D | mdp5_ctl.h | 72 u32 flush_mask, bool start);
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| A D | mdp5_mixer.c | 161 mixer->flush_mask = mdp_ctl_flush_mask_lm(lm->id); in mdp5_mixer_init()
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| A D | mdp5_pipe.c | 168 hwpipe->flush_mask = mdp_ctl_flush_mask_pipe(pipe); in mdp5_pipe_init()
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| A D | mdp5_plane.c | 984 mask = pstate->hwpipe->flush_mask; in mdp5_plane_get_flush()
987 mask |= pstate->r_hwpipe->flush_mask; in mdp5_plane_get_flush()
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| /drivers/net/wireless/mediatek/mt76/mt7603/ |
| A D | mac.c | 183 u32 flush_mask; in mt7603_filter_tx() local
199 flush_mask = MT_WF_ARB_TX_FLUSH_AC0 | in mt7603_filter_tx()
203 flush_mask <<= mac_idx; in mt7603_filter_tx()
205 mt76_wr(dev, MT_WF_ARB_TX_FLUSH_0, flush_mask); in mt7603_filter_tx()
206 mt76_poll(dev, MT_WF_ARB_TX_FLUSH_0, flush_mask, 0, 20000); in mt7603_filter_tx()
207 mt76_wr(dev, MT_WF_ARB_TX_START_0, flush_mask); in mt7603_filter_tx()
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| /drivers/infiniband/hw/irdma/ |
| A D | hw.c | 2715 void irdma_flush_wqes(struct irdma_qp *iwqp, u32 flush_mask) in irdma_flush_wqes() argument
2721 if (!(flush_mask & IRDMA_FLUSH_SQ) && !(flush_mask & IRDMA_FLUSH_RQ)) in irdma_flush_wqes()
2725 info.sq = flush_mask & IRDMA_FLUSH_SQ; in irdma_flush_wqes()
2726 info.rq = flush_mask & IRDMA_FLUSH_RQ; in irdma_flush_wqes()
2735 if (flush_mask & IRDMA_REFLUSH) { in irdma_flush_wqes()
2755 flush_mask & IRDMA_FLUSH_WAIT); in irdma_flush_wqes()
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| A D | main.h | 478 void irdma_flush_wqes(struct irdma_qp *iwqp, u32 flush_mask);
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