Searched refs:frs (Results 1 – 6 of 6) sorted by relevance
| /drivers/gpu/drm/bridge/ |
| A D | tc358768.c | 161 u32 frs; /* PLL Freqency range for HSCK (post divider) */ member
336 u32 frs, best_diff, best_pll, best_prd, best_fbd; in tc358768_calc_pll() local
349 frs = i - 1; in tc358768_calc_pll()
361 u32 divisor = prd * (1 << frs); in tc358768_calc_pll()
401 priv->frs = frs; in tc358768_calc_pll()
618 u32 fbd, prd, frs; in tc358768_setup_pll() local
629 frs = priv->frs; in tc358768_setup_pll()
632 clk_get_rate(priv->refclk), fbd, prd, frs); in tc358768_setup_pll()
644 (frs << 10) | (0x2 << 8) | BIT(1) | BIT(0)); in tc358768_setup_pll()
651 (frs << 10) | (0x2 << 8) | BIT(4) | BIT(1) | BIT(0)); in tc358768_setup_pll()
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| /drivers/media/i2c/ |
| A D | tc358743_regs.h | 90 #define SET_PLL_FRS(frs) (((frs) << 10) & MASK_PLL_FRS) argument
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| /drivers/net/ethernet/cavium/thunder/ |
| A D | nic.h | 591 struct set_frs_msg frs; member
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| A D | nic_main.c | 1039 ret = nic_update_hw_frs(nic, mbx.frs.max_frs, in nic_handle_mbx_intr()
1040 mbx.frs.vf_id); in nic_handle_mbx_intr()
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| A D | nicvf_main.c | 1430 mbx.frs.msg = NIC_MBOX_MSG_SET_MAX_FRS; in nicvf_update_hw_max_frs()
1431 mbx.frs.max_frs = mtu; in nicvf_update_hw_max_frs()
1432 mbx.frs.vf_id = nic->vf_id; in nicvf_update_hw_max_frs()
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| /drivers/nvme/host/ |
| A D | core.c | 4700 memcpy(ctrl->subsys->firmware_rev, &log->frs[cur_fw_slot - 1], in nvme_get_fw_slot_info()
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