| /drivers/thermal/renesas/ |
| A D | rcar_gen3_thermal.c | 264 const struct rcar_gen3_thermal_fuse_info *fuses = priv->info->fuses; in rcar_gen3_thermal_fetch_fuses() local 272 & fuses->mask; in rcar_gen3_thermal_fetch_fuses() 274 & fuses->mask; in rcar_gen3_thermal_fetch_fuses() 276 & fuses->mask; in rcar_gen3_thermal_fetch_fuses() 282 & fuses->mask; in rcar_gen3_thermal_fetch_fuses() 284 & fuses->mask; in rcar_gen3_thermal_fetch_fuses() 286 & fuses->mask; in rcar_gen3_thermal_fetch_fuses() 297 if (!priv->info->fuses || in rcar_gen3_thermal_read_fuses() 368 .fuses = &rcar_gen3_thermal_fuse_info_gen3, 375 .fuses = &rcar_gen3_thermal_fuse_info_gen3, [all …]
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| /drivers/nvmem/ |
| A D | apple-efuses.c | 15 void __iomem *fuses; member 25 *dst++ = readl_relaxed(priv->fuses + offset); in apple_efuses_read() 53 priv->fuses = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in apple_efuses_probe() 54 if (IS_ERR(priv->fuses)) in apple_efuses_probe() 55 return PTR_ERR(priv->fuses); in apple_efuses_probe()
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| A D | Kconfig | 278 Enable support for reading the fuses in the E-FUSE or OTP
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| /drivers/crypto/intel/qat/qat_c3xxx/ |
| A D | adf_c3xxx_hw_data.c | 28 u32 fuses = self->fuses[ADF_FUSECTL0]; in get_accel_mask() local 32 accel = ~(fuses | straps) >> ADF_C3XXX_ACCELERATORS_REG_OFFSET; in get_accel_mask() 40 u32 fuses = self->fuses[ADF_FUSECTL0]; in get_ae_mask() local 52 return ~(fuses | straps) & ADF_C3XXX_ACCELENGINES_MASK; in get_ae_mask()
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| A D | adf_drv.c | 111 &hw_data->fuses[ADF_FUSECTL0]); in adf_probe()
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| /drivers/crypto/intel/qat/qat_c62x/ |
| A D | adf_c62x_hw_data.c | 28 u32 fuses = self->fuses[ADF_FUSECTL0]; in get_accel_mask() local 32 accel = ~(fuses | straps) >> ADF_C62X_ACCELERATORS_REG_OFFSET; in get_accel_mask() 40 u32 fuses = self->fuses[ADF_FUSECTL0]; in get_ae_mask() local 52 return ~(fuses | straps) & ADF_C62X_ACCELENGINES_MASK; in get_ae_mask()
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| A D | adf_drv.c | 111 &hw_data->fuses[ADF_FUSECTL0]); in adf_probe() 154 i = (hw_data->fuses[ADF_FUSECTL0] & ADF_DEVICE_FUSECTL_MASK) ? 1 : 0; in adf_probe()
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| /drivers/crypto/intel/qat/qat_dh895xcc/ |
| A D | adf_dh895xcc_hw_data.c | 30 u32 fuses = self->fuses[ADF_FUSECTL0]; in get_accel_mask() local 32 return ~fuses >> ADF_DH895XCC_ACCELERATORS_REG_OFFSET & in get_accel_mask() 38 u32 fuses = self->fuses[ADF_FUSECTL0]; in get_ae_mask() local 40 return ~fuses & ADF_DH895XCC_ACCELENGINES_MASK; in get_ae_mask() 100 int sku = (self->fuses[ADF_FUSECTL0] & ADF_DH895XCC_FUSECTL_SKU_MASK) in get_sku()
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| A D | adf_drv.c | 111 &hw_data->fuses[ADF_FUSECTL0]); in adf_probe()
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| /drivers/pmdomain/qcom/ |
| A D | cpr.c | 804 const struct cpr_fuse *fuses = drv->cpr_fuses; in cpr_populate_ring_osc_idx() local 808 for (; fuse < end; fuse++, fuses++) { in cpr_populate_ring_osc_idx() 846 const struct cpr_fuse *fuses = drv->cpr_fuses; in cpr_fuse_corner_init() local 1166 quot_offset = fuses[fnum].quotient_offset; in cpr_corner_init() 1219 struct cpr_fuse *fuses; in cpr_get_fuses() local 1225 if (!fuses) in cpr_get_fuses() 1233 if (!fuses[i].ring_osc) in cpr_get_fuses() 1239 if (!fuses[i].init_voltage) in cpr_get_fuses() 1244 if (!fuses[i].quotient) in cpr_get_fuses() 1250 if (!fuses[i].quotient_offset) in cpr_get_fuses() [all …]
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| /drivers/crypto/intel/qat/qat_6xxx/ |
| A D | adf_drv.c | 90 pci_read_config_dword(pdev, ADF_GEN6_FUSECTL4_OFFSET, &hw_data->fuses[ADF_FUSECTL4]); in adf_probe() 91 pci_read_config_dword(pdev, ADF_GEN6_FUSECTL0_OFFSET, &hw_data->fuses[ADF_FUSECTL0]); in adf_probe() 92 pci_read_config_dword(pdev, ADF_GEN6_FUSECTL1_OFFSET, &hw_data->fuses[ADF_FUSECTL1]); in adf_probe() 94 if (!(hw_data->fuses[ADF_FUSECTL1] & ICP_ACCEL_GEN6_MASK_WCP_WAT_SLICE)) in adf_probe()
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| A D | adf_6xxx_hw_data.c | 636 unsigned long fuses = self->fuses[ADF_FUSECTL4]; in get_ae_mask() local 644 if (test_bit(0, &fuses)) in get_ae_mask() 647 if (test_bit(4, &fuses)) in get_ae_mask() 650 if (test_bit(8, &fuses)) in get_ae_mask() 664 fusectl1 = GET_HW_DATA(accel_dev)->fuses[ADF_FUSECTL1]; in get_accel_cap()
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| /drivers/crypto/intel/qat/qat_common/ |
| A D | adf_gen2_hw_data.c | 120 u32 fuses = hw_data->fuses[ADF_FUSECTL0]; in adf_gen2_get_accel_cap() local 146 if ((straps | fuses) & ADF_POWERGATE_PKE) in adf_gen2_get_accel_cap() 149 if ((straps | fuses) & ADF_POWERGATE_DC) in adf_gen2_get_accel_cap()
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| A D | adf_accel_devices.h | 334 u32 fuses[ADF_MAX_FUSES]; member
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| /drivers/crypto/intel/qat/qat_420xx/ |
| A D | adf_drv.c | 82 pci_read_config_dword(pdev, ADF_GEN4_FUSECTL4_OFFSET, &hw_data->fuses[ADF_FUSECTL4]); in adf_probe()
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| A D | adf_420xx_hw_data.c | 99 u32 me_disable = self->fuses[ADF_FUSECTL4]; in get_ae_mask()
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| /drivers/crypto/intel/qat/qat_4xxx/ |
| A D | adf_drv.c | 84 pci_read_config_dword(pdev, ADF_GEN4_FUSECTL4_OFFSET, &hw_data->fuses[ADF_FUSECTL4]); in adf_probe()
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| A D | adf_4xxx_hw_data.c | 103 u32 me_disable = self->fuses[ADF_FUSECTL4]; in get_ae_mask()
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| /drivers/nvme/target/ |
| A D | passthru.c | 138 id->fuses = 0; in nvmet_passthru_override_id_ctrl()
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